{"id":"https://openalex.org/W2965262938","doi":"https://doi.org/10.1109/cicc.2019.8780362","title":"A 5GHz 200kHz/5000ppm Spread-Spectrum Clock Generator with Calibration-Free Two-Point Modulation Using a Nested-Loop BBPLL","display_name":"A 5GHz 200kHz/5000ppm Spread-Spectrum Clock Generator with Calibration-Free Two-Point Modulation Using a Nested-Loop BBPLL","publication_year":2019,"publication_date":"2019-04-01","ids":{"openalex":"https://openalex.org/W2965262938","doi":"https://doi.org/10.1109/cicc.2019.8780362","mag":"2965262938"},"language":"en","primary_location":{"id":"doi:10.1109/cicc.2019.8780362","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cicc.2019.8780362","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IEEE Custom Integrated Circuits Conference (CICC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101451710","display_name":"Xiaohua Huang","orcid":"https://orcid.org/0000-0003-4150-0477"},"institutions":[{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]},{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xiaohua Huang","raw_affiliation_strings":["Institute of Microelectronics, Tsinghua University, Beijing, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089","https://openalex.org/I4210119392"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5083123833","display_name":"Kunnong Zeng","orcid":null},"institutions":[{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]},{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Kunnong Zeng","raw_affiliation_strings":["Institute of Microelectronics, Tsinghua University, Beijing, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089","https://openalex.org/I4210119392"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5059241142","display_name":"Yuguang Liu","orcid":"https://orcid.org/0000-0002-1189-6231"},"institutions":[{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]},{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yuguang Liu","raw_affiliation_strings":["Institute of Microelectronics, Tsinghua University, Beijing, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089","https://openalex.org/I4210119392"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5025671584","display_name":"Woogeun Rhee","orcid":"https://orcid.org/0000-0003-2473-4132"},"institutions":[{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]},{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Woogeun Rhee","raw_affiliation_strings":["Institute of Microelectronics, Tsinghua University, Beijing, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089","https://openalex.org/I4210119392"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5058392128","display_name":"Tae-Ik Kim","orcid":null},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Taeik Kim","raw_affiliation_strings":["Samsung Electronics, Yongin, Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Samsung Electronics, Yongin, Korea","institution_ids":["https://openalex.org/I2250650973"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100356864","display_name":"Zhihua Wang","orcid":"https://orcid.org/0000-0001-6567-0759"},"institutions":[{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]},{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhihua Wang","raw_affiliation_strings":["Institute of Microelectronics, Tsinghua University, Beijing, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089","https://openalex.org/I4210119392"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":6,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.3633,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":{"value":0.61163386,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":91,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.5677566528320312},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5615602135658264},{"id":"https://openalex.org/keywords/modulation","display_name":"Modulation (music)","score":0.5331107378005981},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.47944632172584534},{"id":"https://openalex.org/keywords/clock-generator","display_name":"Clock generator","score":0.4463983178138733},{"id":"https://openalex.org/keywords/delay-locked-loop","display_name":"Delay-locked loop","score":0.442254900932312},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4225151240825653},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.2800061106681824},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.2550503611564636},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.2337106466293335},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.19642925262451172}],"concepts":[{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.5677566528320312},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5615602135658264},{"id":"https://openalex.org/C123079801","wikidata":"https://www.wikidata.org/wiki/Q750240","display_name":"Modulation (music)","level":2,"score":0.5331107378005981},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.47944632172584534},{"id":"https://openalex.org/C2778023540","wikidata":"https://www.wikidata.org/wiki/Q2164847","display_name":"Clock generator","level":4,"score":0.4463983178138733},{"id":"https://openalex.org/C190462668","wikidata":"https://www.wikidata.org/wiki/Q492265","display_name":"Delay-locked loop","level":4,"score":0.442254900932312},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4225151240825653},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.2800061106681824},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.2550503611564636},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.2337106466293335},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.19642925262451172},{"id":"https://openalex.org/C24890656","wikidata":"https://www.wikidata.org/wiki/Q82811","display_name":"Acoustics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/cicc.2019.8780362","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cicc.2019.8780362","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IEEE Custom Integrated Circuits Conference (CICC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.8600000143051147}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":4,"referenced_works":["https://openalex.org/W1480526120","https://openalex.org/W2091734704","https://openalex.org/W2246463401","https://openalex.org/W2807240511"],"related_works":["https://openalex.org/W2301158783","https://openalex.org/W2133120878","https://openalex.org/W2354050524","https://openalex.org/W2083878249","https://openalex.org/W2401743820","https://openalex.org/W3177439118","https://openalex.org/W4295813049","https://openalex.org/W2119216036","https://openalex.org/W2389594899","https://openalex.org/W2976219355"],"abstract_inverted_index":{"This":[0],"paper":[1],"describes":[2],"a":[3,15,21,60],"calibration-free":[4],"two-point":[5,29],"modulation":[6,30,68],"method":[7],"for":[8],"spread-spectrum":[9],"clock":[10,61],"generators":[11],"(SSCGs)":[12],"by":[13],"utilizing":[14],"two-stage":[16],"nested-loop":[17,34],"BBPLL":[18,35],"architecture.":[19],"Having":[20],"1-bit":[22],"TDC":[23,43],"and":[24,44,70],"an":[25],"absolute-gain":[26],"DCO,":[27],"the":[28,33,42,45],"based":[31],"on":[32],"does":[36],"not":[37],"suffer":[38],"from":[39],"nonlinearity":[40],"of":[41,64],"DCO.":[46],"A":[47],"prototype":[48],"5GHz":[49],"SSCG":[50,58],"is":[51],"implemented":[52],"in":[53],"65nm":[54],"CMOS.":[55],"The":[56],"proposed":[57],"achieves":[59],"power":[62],"reduction":[63],"26dB":[65],"with":[66,76],"200kHz":[67],"frequency":[69,72],"5000ppm":[71],"spread,":[73],"consuming":[74],"9mW":[75],"1V":[77],"supply.":[78]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":1},{"year":2023,"cited_by_count":2},{"year":2020,"cited_by_count":3}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
