{"id":"https://openalex.org/W2965945772","doi":"https://doi.org/10.1109/cicc.2019.8780175","title":"A 0.025-mm2 0.8-V 78.5dB-SNDR VCO-Based Sensor Readout Circuit in a Hybrid PLL-\u0394\u03a3M Structure","display_name":"A 0.025-mm2 0.8-V 78.5dB-SNDR VCO-Based Sensor Readout Circuit in a Hybrid PLL-\u0394\u03a3M Structure","publication_year":2019,"publication_date":"2019-04-01","ids":{"openalex":"https://openalex.org/W2965945772","doi":"https://doi.org/10.1109/cicc.2019.8780175","mag":"2965945772"},"language":"en","primary_location":{"id":"doi:10.1109/cicc.2019.8780175","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cicc.2019.8780175","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IEEE Custom Integrated Circuits Conference (CICC)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5030597298","display_name":"Shaolan Li","orcid":"https://orcid.org/0000-0002-2736-5451"},"institutions":[{"id":"https://openalex.org/I86519309","display_name":"The University of Texas at Austin","ror":"https://ror.org/00hj54h04","country_code":"US","type":"education","lineage":["https://openalex.org/I86519309"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Shaolan Li","raw_affiliation_strings":["The University of Texas at Austin, Austin, TX, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"The University of Texas at Austin, Austin, TX, USA","institution_ids":["https://openalex.org/I86519309"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5009698735","display_name":"Wenda Zhao","orcid":"https://orcid.org/0000-0002-1834-646X"},"institutions":[{"id":"https://openalex.org/I86519309","display_name":"The University of Texas at Austin","ror":"https://ror.org/00hj54h04","country_code":"US","type":"education","lineage":["https://openalex.org/I86519309"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Wenda Zhao","raw_affiliation_strings":["The University of Texas at Austin, Austin, TX, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"The University of Texas at Austin, Austin, TX, USA","institution_ids":["https://openalex.org/I86519309"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5063480857","display_name":"Biying Xu","orcid":null},"institutions":[{"id":"https://openalex.org/I86519309","display_name":"The University of Texas at Austin","ror":"https://ror.org/00hj54h04","country_code":"US","type":"education","lineage":["https://openalex.org/I86519309"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Biying Xu","raw_affiliation_strings":["The University of Texas at Austin, Austin, TX, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"The University of Texas at Austin, Austin, TX, USA","institution_ids":["https://openalex.org/I86519309"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5051423351","display_name":"Xiangxing Yang","orcid":"https://orcid.org/0000-0001-8712-2884"},"institutions":[{"id":"https://openalex.org/I86519309","display_name":"The University of Texas at Austin","ror":"https://ror.org/00hj54h04","country_code":"US","type":"education","lineage":["https://openalex.org/I86519309"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Xiangxing Yang","raw_affiliation_strings":["The University of Texas at Austin, Austin, TX, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"The University of Texas at Austin, Austin, TX, USA","institution_ids":["https://openalex.org/I86519309"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5066653944","display_name":"Xiyuan Tang","orcid":"https://orcid.org/0000-0003-2181-9042"},"institutions":[{"id":"https://openalex.org/I86519309","display_name":"The University of Texas at Austin","ror":"https://ror.org/00hj54h04","country_code":"US","type":"education","lineage":["https://openalex.org/I86519309"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Xiyuan Tang","raw_affiliation_strings":["The University of Texas at Austin, Austin, TX, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"The University of Texas at Austin, Austin, TX, USA","institution_ids":["https://openalex.org/I86519309"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5085075194","display_name":"Linxiao Shen","orcid":"https://orcid.org/0000-0001-7933-3673"},"institutions":[{"id":"https://openalex.org/I86519309","display_name":"The University of Texas at Austin","ror":"https://ror.org/00hj54h04","country_code":"US","type":"education","lineage":["https://openalex.org/I86519309"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Linxiao Shen","raw_affiliation_strings":["The University of Texas at Austin, Austin, TX, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"The University of Texas at Austin, Austin, TX, USA","institution_ids":["https://openalex.org/I86519309"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5039650266","display_name":"Nanshu Lu","orcid":"https://orcid.org/0000-0002-3595-3851"},"institutions":[{"id":"https://openalex.org/I86519309","display_name":"The University of Texas at Austin","ror":"https://ror.org/00hj54h04","country_code":"US","type":"education","lineage":["https://openalex.org/I86519309"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Nanshu Lu","raw_affiliation_strings":["The University of Texas at Austin, Austin, TX, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"The University of Texas at Austin, Austin, TX, USA","institution_ids":["https://openalex.org/I86519309"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5011883763","display_name":"David Z. Pan","orcid":"https://orcid.org/0000-0002-5705-2501"},"institutions":[{"id":"https://openalex.org/I86519309","display_name":"The University of Texas at Austin","ror":"https://ror.org/00hj54h04","country_code":"US","type":"education","lineage":["https://openalex.org/I86519309"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"David Z. Pan","raw_affiliation_strings":["The University of Texas at Austin, Austin, TX, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"The University of Texas at Austin, Austin, TX, USA","institution_ids":["https://openalex.org/I86519309"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5070329670","display_name":"Nan Sun","orcid":"https://orcid.org/0000-0002-5536-8385"},"institutions":[{"id":"https://openalex.org/I86519309","display_name":"The University of Texas at Austin","ror":"https://ror.org/00hj54h04","country_code":"US","type":"education","lineage":["https://openalex.org/I86519309"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Nan Sun","raw_affiliation_strings":["The University of Texas at Austin, Austin, TX, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"The University of Texas at Austin, Austin, TX, USA","institution_ids":["https://openalex.org/I86519309"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I86519309"],"apc_list":null,"apc_paid":null,"fwci":6.2617,"has_fulltext":false,"cited_by_count":20,"citation_normalized_percentile":{"value":0.97576638,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":90,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"3"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10299","display_name":"Photonic and Optical Devices","score":0.9961000084877014,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12611","display_name":"Neural Networks and Reservoir Computing","score":0.9932000041007996,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/voltage-controlled-oscillator","display_name":"Voltage-controlled oscillator","score":0.8319860696792603},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6890308260917664},{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.5970920324325562},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.47335052490234375},{"id":"https://openalex.org/keywords/quantization","display_name":"Quantization (signal processing)","score":0.455244243144989},{"id":"https://openalex.org/keywords/capacitive-sensing","display_name":"Capacitive sensing","score":0.43962612748146057},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.3648356795310974},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.35422012209892273},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3348858952522278},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3245125412940979},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2558324933052063},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.24113965034484863},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.06875103712081909},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.05580165982246399}],"concepts":[{"id":"https://openalex.org/C5291336","wikidata":"https://www.wikidata.org/wiki/Q852341","display_name":"Voltage-controlled oscillator","level":3,"score":0.8319860696792603},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6890308260917664},{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.5970920324325562},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.47335052490234375},{"id":"https://openalex.org/C28855332","wikidata":"https://www.wikidata.org/wiki/Q198099","display_name":"Quantization (signal processing)","level":2,"score":0.455244243144989},{"id":"https://openalex.org/C206755178","wikidata":"https://www.wikidata.org/wiki/Q1131271","display_name":"Capacitive sensing","level":2,"score":0.43962612748146057},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.3648356795310974},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.35422012209892273},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3348858952522278},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3245125412940979},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2558324933052063},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.24113965034484863},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.06875103712081909},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.05580165982246399}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/cicc.2019.8780175","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cicc.2019.8780175","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IEEE Custom Integrated Circuits Conference (CICC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.7300000190734863,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W2070109416","https://openalex.org/W1523213765","https://openalex.org/W2040399070","https://openalex.org/W2388316590","https://openalex.org/W4388486464","https://openalex.org/W2976219355","https://openalex.org/W2089131288","https://openalex.org/W1600405202","https://openalex.org/W1486070987","https://openalex.org/W3064661991"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3,9],"capacitive-coupled":[4],"VCO-based":[5,31,74],"sensor":[6],"readout":[7,54],"featuring":[8],"hybrid":[10],"PLL-\u0394\u03a3M":[11],"structure.":[12],"It":[13],"leverages":[14],"phase-locking":[15],"and":[16,23,63],"PFD":[17],"array":[18],"to":[19,29,42],"concurrently":[20],"perform":[21],"quantization":[22],"DEM,":[24],"much":[25],"reducing":[26],"hardware/power":[27],"compared":[28],"existing":[30],"readouts":[32,75],"counting":[33],"scheme.":[34],"A":[35],"low-cost":[36],"in-cell":[37],"DWA":[38],"scheme":[39],"is":[40],"presented":[41],"enable":[43],"highly":[44],"linear":[45],"tri-level":[46],"DAC.":[47],"Fabricated":[48],"in":[49,58],"40nm":[50],"CMOS,":[51],"the":[52],"prototype":[53],"achieves":[55],"78dB":[56],"SNDR":[57],"10kHz":[59],"BW,":[60],"consuming":[61],"4.5\u03bcW":[62],"0.025mm2active":[64],"area.":[65],"With":[66],"172dB":[67],"Schreier":[68],"FoM,":[69],"its":[70],"efficiency":[71],"advances":[72],"state-of-the-art":[73],"by":[76],"50\u00d7.":[77]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":4},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":5},{"year":2020,"cited_by_count":5},{"year":2019,"cited_by_count":1}],"updated_date":"2026-08-21T09:56:20.448147","created_date":"2025-10-10T00:00:00"}
