{"id":"https://openalex.org/W2057259184","doi":"https://doi.org/10.1109/cicc.2014.6946052","title":"Conductance modulation techniques in switched-capacitor DC-DC converter for maximum-efficiency tracking and ripple mitigation in 22nm Tri-gate CMOS","display_name":"Conductance modulation techniques in switched-capacitor DC-DC converter for maximum-efficiency tracking and ripple mitigation in 22nm Tri-gate CMOS","publication_year":2014,"publication_date":"2014-09-01","ids":{"openalex":"https://openalex.org/W2057259184","doi":"https://doi.org/10.1109/cicc.2014.6946052","mag":"2057259184"},"language":"en","primary_location":{"id":"doi:10.1109/cicc.2014.6946052","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cicc.2014.6946052","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the IEEE 2014 Custom Integrated Circuits Conference","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5111558720","display_name":"Rinkle Jain","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Rinkle Jain","raw_affiliation_strings":["Circuit Research Lab, Intel Corporation, Hillsboro, OR, USA","Circuit Res. Labs, Intel Corp., Hillsboro, OR, USA"],"affiliations":[{"raw_affiliation_string":"Circuit Research Lab, Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Circuit Res. Labs, Intel Corp., Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109374260","display_name":"Stephen Kim","orcid":"https://orcid.org/0009-0008-4986-3233"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Stephen Kim","raw_affiliation_strings":["Circuit Research Lab, Intel Corporation, Hillsboro, OR, USA","Circuit Res. Labs, Intel Corp., Hillsboro, OR, USA"],"affiliations":[{"raw_affiliation_string":"Circuit Research Lab, Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Circuit Res. Labs, Intel Corp., Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5018279997","display_name":"Vaibhav Vaidya","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Vaibhav Vaidya","raw_affiliation_strings":["Circuit Research Lab, Intel Corporation, Hillsboro, OR, USA","Circuit Res. Labs, Intel Corp., Hillsboro, OR, USA"],"affiliations":[{"raw_affiliation_string":"Circuit Research Lab, Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Circuit Res. Labs, Intel Corp., Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5067753561","display_name":"James Tschanz","orcid":"https://orcid.org/0000-0003-0317-4332"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"James Tschanz","raw_affiliation_strings":["Circuit Research Lab, Intel Corporation, Hillsboro, OR, USA","Circuit Res. Labs, Intel Corp., Hillsboro, OR, USA"],"affiliations":[{"raw_affiliation_string":"Circuit Research Lab, Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Circuit Res. Labs, Intel Corp., Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5061932619","display_name":"Krishnan Ravichandran","orcid":"https://orcid.org/0000-0003-2271-4314"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Krishnan Ravichandran","raw_affiliation_strings":["Intel Corp, Santa Clara, CA, US","Circuit Res. Labs, Intel Corp., Hillsboro, OR, USA"],"affiliations":[{"raw_affiliation_string":"Intel Corp, Santa Clara, CA, US","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Circuit Res. Labs, Intel Corp., Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5076642880","display_name":"Vivek De","orcid":"https://orcid.org/0000-0001-5207-1079"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Vivek De","raw_affiliation_strings":["Circuit Research Lab, Intel Corporation, Hillsboro, OR, USA","Circuit Res. Labs, Intel Corp., Hillsboro, OR, USA"],"affiliations":[{"raw_affiliation_string":"Circuit Research Lab, Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Circuit Res. Labs, Intel Corp., Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5111558720"],"corresponding_institution_ids":["https://openalex.org/I1343180700"],"apc_list":null,"apc_paid":null,"fwci":0.628,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":{"value":0.73549199,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":"45","issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10361","display_name":"Silicon Carbide Semiconductor Technologies","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/ripple","display_name":"Ripple","score":0.7509628534317017},{"id":"https://openalex.org/keywords/switched-capacitor","display_name":"Switched capacitor","score":0.7488194704055786},{"id":"https://openalex.org/keywords/capacitor","display_name":"Capacitor","score":0.6331690549850464},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5474534630775452},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5230687260627747},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.48879262804985046},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.4734334945678711},{"id":"https://openalex.org/keywords/interleaving","display_name":"Interleaving","score":0.4710041582584381},{"id":"https://openalex.org/keywords/modulation","display_name":"Modulation (music)","score":0.45896175503730774},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.4550096392631531},{"id":"https://openalex.org/keywords/mosfet","display_name":"MOSFET","score":0.44815170764923096},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.3642239570617676},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.33677226305007935},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.12748512625694275},{"id":"https://openalex.org/keywords/acoustics","display_name":"Acoustics","score":0.07464998960494995}],"concepts":[{"id":"https://openalex.org/C2779599953","wikidata":"https://www.wikidata.org/wiki/Q1776117","display_name":"Ripple","level":3,"score":0.7509628534317017},{"id":"https://openalex.org/C103357873","wikidata":"https://www.wikidata.org/wiki/Q572656","display_name":"Switched capacitor","level":4,"score":0.7488194704055786},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.6331690549850464},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5474534630775452},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5230687260627747},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.48879262804985046},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.4734334945678711},{"id":"https://openalex.org/C28034677","wikidata":"https://www.wikidata.org/wiki/Q17092530","display_name":"Interleaving","level":2,"score":0.4710041582584381},{"id":"https://openalex.org/C123079801","wikidata":"https://www.wikidata.org/wiki/Q750240","display_name":"Modulation (music)","level":2,"score":0.45896175503730774},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.4550096392631531},{"id":"https://openalex.org/C2778413303","wikidata":"https://www.wikidata.org/wiki/Q210793","display_name":"MOSFET","level":4,"score":0.44815170764923096},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.3642239570617676},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.33677226305007935},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.12748512625694275},{"id":"https://openalex.org/C24890656","wikidata":"https://www.wikidata.org/wiki/Q82811","display_name":"Acoustics","level":1,"score":0.07464998960494995}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/cicc.2014.6946052","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cicc.2014.6946052","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the IEEE 2014 Custom Integrated Circuits Conference","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.8600000143051147}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W1655266410","https://openalex.org/W2389051085","https://openalex.org/W2330343234","https://openalex.org/W1901012776","https://openalex.org/W2463883322","https://openalex.org/W2229382548","https://openalex.org/W2391789612","https://openalex.org/W2166626446","https://openalex.org/W2127678206","https://openalex.org/W2124313625"],"abstract_inverted_index":{"Active":[0],"conduction":[1],"modulation":[2],"techniques":[3],"are":[4,91],"demonstrated":[5],"in":[6,18,80,115],"a":[7,42,50,65],"fully":[8],"integrated":[9],"multi-ratio":[10],"switched-capacitor":[11],"voltage":[12],"regulator":[13],"with":[14,22],"hysteretic":[15],"control,":[16],"implemented":[17],"22nm":[19],"tri-gate":[20],"CMOS":[21],"high-density":[23],"MIM":[24],"capacitor.":[25],"We":[26],"present":[27],"(i)":[28],"an":[29],"adaptive":[30],"switching":[31],"frequency":[32],"and":[33,46,61,63,109,121],"switch-size":[34],"scaling":[35],"scheme":[36],"for":[37],"maximum":[38],"efficiency":[39,119],"tracking":[40],"across":[41,58],"wide":[43],"range":[44],"voltages":[45],"currents,":[47],"governed":[48],"by":[49],"frequency-based":[51],"control":[52],"law":[53],"that":[54],"is":[55,102],"experimentally":[56],"validated":[57],"multiple":[59],"dies":[60],"temperatures,":[62],"(ii)":[64],"simple":[66],"active":[67],"ripple":[68,99],"mitigation":[69],"technique":[70],"to":[71],"modulate":[72],"gate":[73],"drive":[74],"of":[75,100,113],"select":[76],"MOSFET":[77],"switches":[78],"effectively":[79],"all":[81],"conversion":[82],"modes.":[83],"Efficiency":[84],"boosts":[85],"upto":[86],"15%":[87],"at":[88],"light":[89,94],"loads":[90],"measured":[92],"under":[93],"load":[95],"conditions.":[96],"Load-independent":[97],"output":[98],"<50mV":[101],"achieved,":[103],"enabling":[104],"fewer":[105],"interleaving.":[106],"Testchip":[107],"implementations":[108],"measurements":[110],"demonstrate":[111],"ease":[112],"integration":[114],"SoC":[116],"designs,":[117],"power":[118],"benefits":[120],"EMI/RFI":[122],"improvements.":[123]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
