{"id":"https://openalex.org/W2005346196","doi":"https://doi.org/10.1109/cicc.2014.6946029","title":"Directions in future of SRAM with QDR-WideIO for high performance networking applications and beyond","display_name":"Directions in future of SRAM with QDR-WideIO for high performance networking applications and beyond","publication_year":2014,"publication_date":"2014-09-01","ids":{"openalex":"https://openalex.org/W2005346196","doi":"https://doi.org/10.1109/cicc.2014.6946029","mag":"2005346196"},"language":"en","primary_location":{"id":"doi:10.1109/cicc.2014.6946029","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cicc.2014.6946029","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the IEEE 2014 Custom Integrated Circuits Conference","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5103040522","display_name":"A. Keshavarzi","orcid":"https://orcid.org/0000-0001-6938-1161"},"institutions":[{"id":"https://openalex.org/I4210127281","display_name":"Cypress Semiconductor Corporation (United States)","ror":"https://ror.org/02wpc5d77","country_code":"US","type":"company","lineage":["https://openalex.org/I4210127281"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Ali Keshavarzi","raw_affiliation_strings":["Cypress Semiconductor, San Jose, CA, USA","Cypress Semiconductor, San Jose, CA 95134, USA"],"affiliations":[{"raw_affiliation_string":"Cypress Semiconductor, San Jose, CA, USA","institution_ids":["https://openalex.org/I4210127281"]},{"raw_affiliation_string":"Cypress Semiconductor, San Jose, CA 95134, USA","institution_ids":["https://openalex.org/I4210127281"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5085333319","display_name":"Dinesh Maheshwari","orcid":null},"institutions":[{"id":"https://openalex.org/I4210127281","display_name":"Cypress Semiconductor Corporation (United States)","ror":"https://ror.org/02wpc5d77","country_code":"US","type":"company","lineage":["https://openalex.org/I4210127281"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Dinesh Maheshwari","raw_affiliation_strings":["Cypress Semiconductor, San Jose, CA, USA","Cypress Semiconductor, San Jose, CA 95134, USA"],"affiliations":[{"raw_affiliation_string":"Cypress Semiconductor, San Jose, CA, USA","institution_ids":["https://openalex.org/I4210127281"]},{"raw_affiliation_string":"Cypress Semiconductor, San Jose, CA 95134, USA","institution_ids":["https://openalex.org/I4210127281"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5075214843","display_name":"Derwin Mattos","orcid":null},"institutions":[{"id":"https://openalex.org/I4210127281","display_name":"Cypress Semiconductor Corporation (United States)","ror":"https://ror.org/02wpc5d77","country_code":"US","type":"company","lineage":["https://openalex.org/I4210127281"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Derwin Mattos","raw_affiliation_strings":["Cypress Semiconductor, San Jose, CA, USA","Cypress Semiconductor, San Jose, CA 95134, USA"],"affiliations":[{"raw_affiliation_string":"Cypress Semiconductor, San Jose, CA, USA","institution_ids":["https://openalex.org/I4210127281"]},{"raw_affiliation_string":"Cypress Semiconductor, San Jose, CA 95134, USA","institution_ids":["https://openalex.org/I4210127281"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5053811320","display_name":"Ravi Kapre","orcid":null},"institutions":[{"id":"https://openalex.org/I4210127281","display_name":"Cypress Semiconductor Corporation (United States)","ror":"https://ror.org/02wpc5d77","country_code":"US","type":"company","lineage":["https://openalex.org/I4210127281"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ravi Kapre","raw_affiliation_strings":["Cypress Semiconductor, San Jose, CA, USA","Cypress Semiconductor, San Jose, CA 95134, USA"],"affiliations":[{"raw_affiliation_string":"Cypress Semiconductor, San Jose, CA, USA","institution_ids":["https://openalex.org/I4210127281"]},{"raw_affiliation_string":"Cypress Semiconductor, San Jose, CA 95134, USA","institution_ids":["https://openalex.org/I4210127281"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110003223","display_name":"Sandeep Krishnegowda","orcid":null},"institutions":[{"id":"https://openalex.org/I4210127281","display_name":"Cypress Semiconductor Corporation (United States)","ror":"https://ror.org/02wpc5d77","country_code":"US","type":"company","lineage":["https://openalex.org/I4210127281"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sandeep Krishnegowda","raw_affiliation_strings":["Cypress Semiconductor, San Jose, CA, USA","Cypress Semiconductor, San Jose, CA 95134, USA"],"affiliations":[{"raw_affiliation_string":"Cypress Semiconductor, San Jose, CA, USA","institution_ids":["https://openalex.org/I4210127281"]},{"raw_affiliation_string":"Cypress Semiconductor, San Jose, CA 95134, USA","institution_ids":["https://openalex.org/I4210127281"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5041131828","display_name":"Morgan Whately","orcid":null},"institutions":[{"id":"https://openalex.org/I4210127281","display_name":"Cypress Semiconductor Corporation (United States)","ror":"https://ror.org/02wpc5d77","country_code":"US","type":"company","lineage":["https://openalex.org/I4210127281"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Morgan Whately","raw_affiliation_strings":["Cypress Semiconductor, San Jose, CA, USA","Cypress Semiconductor, San Jose, CA 95134, USA"],"affiliations":[{"raw_affiliation_string":"Cypress Semiconductor, San Jose, CA, USA","institution_ids":["https://openalex.org/I4210127281"]},{"raw_affiliation_string":"Cypress Semiconductor, San Jose, CA 95134, USA","institution_ids":["https://openalex.org/I4210127281"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5016515575","display_name":"Sudhir Gopalswamy","orcid":null},"institutions":[{"id":"https://openalex.org/I4210127281","display_name":"Cypress Semiconductor Corporation (United States)","ror":"https://ror.org/02wpc5d77","country_code":"US","type":"company","lineage":["https://openalex.org/I4210127281"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sudhir Gopalswamy","raw_affiliation_strings":["Cypress Semiconductor, San Jose, CA, USA","Cypress Semiconductor, San Jose, CA 95134, USA"],"affiliations":[{"raw_affiliation_string":"Cypress Semiconductor, San Jose, CA, USA","institution_ids":["https://openalex.org/I4210127281"]},{"raw_affiliation_string":"Cypress Semiconductor, San Jose, CA 95134, USA","institution_ids":["https://openalex.org/I4210127281"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":7,"corresponding_author_ids":["https://openalex.org/A5103040522"],"corresponding_institution_ids":["https://openalex.org/I4210127281"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.10190904,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":95},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.998199999332428,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9944000244140625,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.8256769180297852},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6938117742538452},{"id":"https://openalex.org/keywords/dram","display_name":"Dram","score":0.5554312467575073},{"id":"https://openalex.org/keywords/router","display_name":"Router","score":0.4950334429740906},{"id":"https://openalex.org/keywords/memory-bandwidth","display_name":"Memory bandwidth","score":0.4734753370285034},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.4734717905521393},{"id":"https://openalex.org/keywords/registered-memory","display_name":"Registered memory","score":0.46237561106681824},{"id":"https://openalex.org/keywords/sense-amplifier","display_name":"Sense amplifier","score":0.44225844740867615},{"id":"https://openalex.org/keywords/interface","display_name":"Interface (matter)","score":0.42917096614837646},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.42371463775634766},{"id":"https://openalex.org/keywords/interleaved-memory","display_name":"Interleaved memory","score":0.42215120792388916},{"id":"https://openalex.org/keywords/random-access-memory","display_name":"Random access memory","score":0.41917771100997925},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.33740776777267456},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3358214497566223},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.31223011016845703},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.2855565547943115},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.28152018785476685},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.2782478332519531}],"concepts":[{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.8256769180297852},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6938117742538452},{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.5554312467575073},{"id":"https://openalex.org/C2775896111","wikidata":"https://www.wikidata.org/wiki/Q642560","display_name":"Router","level":2,"score":0.4950334429740906},{"id":"https://openalex.org/C188045654","wikidata":"https://www.wikidata.org/wiki/Q17148339","display_name":"Memory bandwidth","level":2,"score":0.4734753370285034},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.4734717905521393},{"id":"https://openalex.org/C93446704","wikidata":"https://www.wikidata.org/wiki/Q449328","display_name":"Registered memory","level":3,"score":0.46237561106681824},{"id":"https://openalex.org/C32666082","wikidata":"https://www.wikidata.org/wiki/Q7450979","display_name":"Sense amplifier","level":3,"score":0.44225844740867615},{"id":"https://openalex.org/C113843644","wikidata":"https://www.wikidata.org/wiki/Q901882","display_name":"Interface (matter)","level":4,"score":0.42917096614837646},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.42371463775634766},{"id":"https://openalex.org/C63511323","wikidata":"https://www.wikidata.org/wiki/Q908936","display_name":"Interleaved memory","level":4,"score":0.42215120792388916},{"id":"https://openalex.org/C2994168587","wikidata":"https://www.wikidata.org/wiki/Q5295","display_name":"Random access memory","level":2,"score":0.41917771100997925},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.33740776777267456},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3358214497566223},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.31223011016845703},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.2855565547943115},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.28152018785476685},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.2782478332519531},{"id":"https://openalex.org/C129307140","wikidata":"https://www.wikidata.org/wiki/Q6795880","display_name":"Maximum bubble pressure method","level":3,"score":0.0},{"id":"https://openalex.org/C157915830","wikidata":"https://www.wikidata.org/wiki/Q2928001","display_name":"Bubble","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/cicc.2014.6946029","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cicc.2014.6946029","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the IEEE 2014 Custom Integrated Circuits Conference","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.5799999833106995,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320332195","display_name":"Samsung","ror":"https://ror.org/04w3jy968"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W1603554804","https://openalex.org/W1973361253","https://openalex.org/W1974338211","https://openalex.org/W1998798369","https://openalex.org/W2014651988","https://openalex.org/W2027191919","https://openalex.org/W2041446224","https://openalex.org/W2047274964","https://openalex.org/W2059802705","https://openalex.org/W2066728424","https://openalex.org/W2073818373","https://openalex.org/W2099697258","https://openalex.org/W2111242202","https://openalex.org/W2139005710","https://openalex.org/W2580545524","https://openalex.org/W6635986632","https://openalex.org/W6644065506","https://openalex.org/W6676730230"],"related_works":["https://openalex.org/W4238754064","https://openalex.org/W3008068282","https://openalex.org/W1975698617","https://openalex.org/W2130320819","https://openalex.org/W2409197925","https://openalex.org/W2162231486","https://openalex.org/W2136004815","https://openalex.org/W4210611780","https://openalex.org/W192622089","https://openalex.org/W2136268150"],"abstract_inverted_index":{"In":[0],"this":[1],"paper":[2],"we":[3,186],"describe":[4,112,187],"the":[5,104,107,113,131],"high":[6,28,42],"performance":[7,29],"synchronous":[8,147],"QDR-WideIO":[9,52,162],"SRAM":[10,84,105],"KGD":[11],"from":[12],"Cypress":[13],"that":[14,82,118],"is":[15],"architected":[16],"with":[17,22,175,179],"fast":[18],"and":[19,31,85,89,95,116,149,170],"wide":[20],"interface":[21,64],"optimized":[23],"memory":[24,114,132],"sub-system":[25],"for":[26,35,120,168,173],"future":[27,192],"networking":[30,38,77],"computing":[32],"applications.":[33],"Systems":[34],"next":[36],"generation":[37,144],"switches":[39],"rely":[40],"on":[41,54],"rate":[43],"router":[44],"line":[45],"cards":[46],"of":[47,135,145,152,165,177,193],"200":[48],"to":[49,70,102,130],"400":[50],"Gbps.":[51],"fabricated":[53],"28nm":[55],"HKMG":[56],"technology":[57],"builds":[58],"upon":[59],"High":[60],"Bandwidth":[61],"Memory":[62],"(HBM)":[63],"standard":[65],"while":[66],"using":[67],"2.5D/3D":[68],"stacking":[69],"form":[71],"a":[72,158,188],"System":[73],"in":[74,92,157],"Package":[75],"(SiP)":[76],"system":[78],"solutions.":[79],"We":[80,110],"explain":[81],"both":[83],"DRAM":[86],"are":[87],"necessary":[88],"can":[90],"co-exist":[91],"these":[93],"systems":[94],"why":[96],"it":[97],"does":[98],"not":[99],"make":[100],"sense":[101],"integrate":[103],"inside":[106],"logic":[108],"ASIC.":[109],"also":[111],"design":[115],"partitioning":[117],"allows":[119],"delivering":[121],"requisite":[122],"Random":[123],"Transaction":[124],"Rate":[125],"(RTR)":[126],"representing":[127],"random":[128],"accesses":[129],"per":[133],"second":[134],"approaching":[136],"24000":[137],"MT/s":[138],"(>10X":[139],"improvement":[140],"over":[141],"our":[142],"previous":[143],"QDR-IV":[146],"SRAM)":[148],"total":[150],"bandwidth":[151],"greater":[153],"than":[154],"1.5":[155],"Tbps":[156],"power":[159],"efficient":[160],"way.":[161],"achieves":[163],"latency":[164],"13":[166],"cycles":[167,172],"read":[169],"8":[171],"write":[174],"density":[176],"288Mb":[178],"core":[180],"operating":[181],"at":[182],"1500":[183],"MHz.":[184],"Finally":[185],"path":[189],"forward":[190],"toward":[191],"in-package":[194],"integrated":[195],"products.":[196]},"counts_by_year":[{"year":2021,"cited_by_count":2},{"year":2018,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
