{"id":"https://openalex.org/W2093501922","doi":"https://doi.org/10.1109/cicc.2014.6946000","title":"Technology-design-manufacturing co-optimization for advanced mobile SoCs","display_name":"Technology-design-manufacturing co-optimization for advanced mobile SoCs","publication_year":2014,"publication_date":"2014-09-01","ids":{"openalex":"https://openalex.org/W2093501922","doi":"https://doi.org/10.1109/cicc.2014.6946000","mag":"2093501922"},"language":"en","primary_location":{"id":"doi:10.1109/cicc.2014.6946000","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cicc.2014.6946000","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the IEEE 2014 Custom Integrated Circuits Conference","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5060239328","display_name":"Geoffrey Yeap","orcid":"https://orcid.org/0000-0002-7767-7656"},"institutions":[{"id":"https://openalex.org/I4210087596","display_name":"Qualcomm (United States)","ror":"https://ror.org/002zrf773","country_code":"US","type":"company","lineage":["https://openalex.org/I4210087596"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Geoffrey Yeap","raw_affiliation_strings":["Qualcomm Technologies Inc., San Diego, CA","Qualcomm Technologies, Inc., 5775 Morehouse drive, San Diego, CA 92121"],"affiliations":[{"raw_affiliation_string":"Qualcomm Technologies Inc., San Diego, CA","institution_ids":["https://openalex.org/I4210087596"]},{"raw_affiliation_string":"Qualcomm Technologies, Inc., 5775 Morehouse drive, San Diego, CA 92121","institution_ids":["https://openalex.org/I4210087596"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5060239328"],"corresponding_institution_ids":["https://openalex.org/I4210087596"],"apc_list":null,"apc_paid":null,"fwci":1.0344,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.80857281,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":91,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"8"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.998199999332428,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.998199999332428,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.998199999332428,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/key","display_name":"Key (lock)","score":0.5129932761192322},{"id":"https://openalex.org/keywords/mobile-device","display_name":"Mobile device","score":0.5082473158836365},{"id":"https://openalex.org/keywords/electronics","display_name":"Electronics","score":0.5054283142089844},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.49416425824165344},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.48667484521865845},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.45229920744895935},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.43294256925582886},{"id":"https://openalex.org/keywords/time-to-market","display_name":"Time to market","score":0.423282265663147},{"id":"https://openalex.org/keywords/design-technology","display_name":"Design technology","score":0.4140962064266205},{"id":"https://openalex.org/keywords/manufacturing-engineering","display_name":"Manufacturing engineering","score":0.38791632652282715},{"id":"https://openalex.org/keywords/systems-engineering","display_name":"Systems engineering","score":0.37202340364456177},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3535267114639282},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2093181312084198},{"id":"https://openalex.org/keywords/computer-security","display_name":"Computer security","score":0.159918874502182}],"concepts":[{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.5129932761192322},{"id":"https://openalex.org/C186967261","wikidata":"https://www.wikidata.org/wiki/Q5082128","display_name":"Mobile device","level":2,"score":0.5082473158836365},{"id":"https://openalex.org/C138331895","wikidata":"https://www.wikidata.org/wiki/Q11650","display_name":"Electronics","level":2,"score":0.5054283142089844},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.49416425824165344},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.48667484521865845},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.45229920744895935},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.43294256925582886},{"id":"https://openalex.org/C2779229675","wikidata":"https://www.wikidata.org/wiki/Q445235","display_name":"Time to market","level":2,"score":0.423282265663147},{"id":"https://openalex.org/C179737136","wikidata":"https://www.wikidata.org/wiki/Q5264382","display_name":"Design technology","level":2,"score":0.4140962064266205},{"id":"https://openalex.org/C117671659","wikidata":"https://www.wikidata.org/wiki/Q11049265","display_name":"Manufacturing engineering","level":1,"score":0.38791632652282715},{"id":"https://openalex.org/C201995342","wikidata":"https://www.wikidata.org/wiki/Q682496","display_name":"Systems engineering","level":1,"score":0.37202340364456177},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3535267114639282},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2093181312084198},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.159918874502182},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/cicc.2014.6946000","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cicc.2014.6946000","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the IEEE 2014 Custom Integrated Circuits Conference","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W1532733860","https://openalex.org/W1773549090","https://openalex.org/W1974376306","https://openalex.org/W1983920947","https://openalex.org/W1988422687","https://openalex.org/W2011447028","https://openalex.org/W2012602696","https://openalex.org/W2052822829","https://openalex.org/W2123625967","https://openalex.org/W2142289911","https://openalex.org/W2798411978","https://openalex.org/W6632075574","https://openalex.org/W6638196047","https://openalex.org/W6678500929"],"related_works":["https://openalex.org/W2138990110","https://openalex.org/W2542547697","https://openalex.org/W2100322987","https://openalex.org/W2607447167","https://openalex.org/W4236604936","https://openalex.org/W1498721867","https://openalex.org/W2108827571","https://openalex.org/W2183741735","https://openalex.org/W1585773602","https://openalex.org/W3005218804"],"abstract_inverted_index":{"How":[0],"to":[1,20,53],"maintain":[2],"the":[3,8,14,23,56,72,88,93,100,122,137,150,161],"Moore's":[4],"Law":[5],"scaling":[6],"beyond":[7],"193":[9],"immersion":[10],"resolution":[11],"limit":[12],"is":[13,51],"key":[15],"question":[16],"semiconductor":[17,141],"industry":[18],"needs":[19],"answer":[21],"in":[22,119,160],"near":[24],"future.":[25],"Process":[26],"complexity":[27],"will":[28],"undoubtfully":[29],"increase":[30],"for":[31,42,140],"14nm":[32],"node":[33],"and":[34,40,114,127,144,158,167],"beyond,":[35],"which":[36],"brings":[37],"both":[38],"challenges":[39],"opportunities":[41],"technology":[43,101,142,157],"development.":[44],"A":[45],"vertically":[46],"integrated":[47],"technology-design-manufacturing":[48],"co-optimization":[49,151],"flow":[50],"desired":[52],"better":[54,108],"address":[55],"complicated":[57],"issues":[58],"new":[59],"process":[60,156,165],"changes":[61],"bring.":[62],"In":[63],"recent":[64],"years":[65],"smart":[66],"mobile":[67,79],"wireless":[68],"devices":[69,80],"have":[70],"been":[71],"fastest":[73],"growing":[74,164],"consumer":[75],"electronics":[76],"market.":[77],"Advanced":[78],"such":[81],"as":[82,169,171],"smartphones":[83],"are":[84,107],"complex":[85],"systems":[86],"with":[87,129],"overriding":[89],"objective":[90],"of":[91,124,163],"providing":[92],"best":[94],"user-experience":[95],"value":[96],"by":[97],"harnessing":[98],"all":[99],"innovations.":[102,131],"Most":[103],"critical":[104],"system":[105,109,125],"drivers":[106],"performance/power":[110],"efficiency,":[111],"cost":[112],"effectiveness,":[113],"smaller":[115],"form":[116],"factors,":[117],"which,":[118],"turns,":[120],"drive":[121],"need":[123],"design":[126,172],"solution":[128],"More-than-Moore":[130],"Mobile":[132],"system-on-chips":[133],"(SoCs)":[134],"has":[135],"become":[136],"leading":[138],"driver":[139],"definition":[143],"manufacturing.":[145],"Here":[146],"we":[147],"highlight":[148],"how":[149],"strategy":[152],"influenced":[153],"architecture,":[154],"device/circuit,":[155],"package,":[159],"face":[162],"cost/complexity":[166],"variability":[168],"well":[170],"rule":[173],"restrictions.":[174]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2016,"cited_by_count":3}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
