{"id":"https://openalex.org/W2029932084","doi":"https://doi.org/10.1109/cicc.2013.6658567","title":"Analog techniques II","display_name":"Analog techniques II","publication_year":2013,"publication_date":"2013-09-01","ids":{"openalex":"https://openalex.org/W2029932084","doi":"https://doi.org/10.1109/cicc.2013.6658567","mag":"2029932084"},"language":"en","primary_location":{"id":"doi:10.1109/cicc.2013.6658567","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cicc.2013.6658567","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the IEEE 2013 Custom Integrated Circuits Conference","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5002626327","display_name":"Hasnain Lakdawala","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Hasnain Lakdawala","raw_affiliation_strings":["Intel (United States), Santa Clara, United States"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel (United States), Santa Clara, United States","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5033283908","display_name":"E. Naviasky","orcid":null},"institutions":[{"id":"https://openalex.org/I66217453","display_name":"Cadence Design Systems (United States)","ror":"https://ror.org/04w8xa018","country_code":"US","type":"company","lineage":["https://openalex.org/I66217453"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Eric Naviasky","raw_affiliation_strings":["Cadence Design Systems (United States), San Jose, United States"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Cadence Design Systems (United States), San Jose, United States","institution_ids":["https://openalex.org/I66217453"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.12769867,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"1"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12564","display_name":"Sensor Technology and Measurement Systems","score":0.9718999862670898,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12564","display_name":"Sensor Technology and Measurement Systems","score":0.9718999862670898,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6721782684326172},{"id":"https://openalex.org/keywords/analogue-electronics","display_name":"Analogue electronics","score":0.5797833800315857},{"id":"https://openalex.org/keywords/session","display_name":"Session (web analytics)","score":0.5693979263305664},{"id":"https://openalex.org/keywords/cover","display_name":"Cover (algebra)","score":0.5603153705596924},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.46228814125061035},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4034518599510193},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3267984688282013},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3105437159538269},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1849704384803772},{"id":"https://openalex.org/keywords/world-wide-web","display_name":"World Wide Web","score":0.06875228881835938}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6721782684326172},{"id":"https://openalex.org/C29074008","wikidata":"https://www.wikidata.org/wiki/Q174925","display_name":"Analogue electronics","level":3,"score":0.5797833800315857},{"id":"https://openalex.org/C2779182362","wikidata":"https://www.wikidata.org/wiki/Q17126187","display_name":"Session (web analytics)","level":2,"score":0.5693979263305664},{"id":"https://openalex.org/C2780428219","wikidata":"https://www.wikidata.org/wiki/Q16952335","display_name":"Cover (algebra)","level":2,"score":0.5603153705596924},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.46228814125061035},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4034518599510193},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3267984688282013},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3105437159538269},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1849704384803772},{"id":"https://openalex.org/C136764020","wikidata":"https://www.wikidata.org/wiki/Q466","display_name":"World Wide Web","level":1,"score":0.06875228881835938},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/cicc.2013.6658567","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cicc.2013.6658567","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the IEEE 2013 Custom Integrated Circuits Conference","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W4296749040","https://openalex.org/W4230197055","https://openalex.org/W621808327","https://openalex.org/W644007644","https://openalex.org/W2497198634","https://openalex.org/W3012257603","https://openalex.org/W1586784764","https://openalex.org/W4292264782","https://openalex.org/W1559289099","https://openalex.org/W2375192119"],"abstract_inverted_index":{"The":[0],"four":[1],"papers":[2],"in":[3,8,17],"the":[4,9,12],"session":[5],"cover":[6],"progress":[7],"state":[10],"of":[11,14],"art":[13],"analog":[15],"circuits":[16],"data":[18],"conversion":[19],"and":[20],"frequency":[21],"generation.":[22]},"counts_by_year":[],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
