{"id":"https://openalex.org/W2133111583","doi":"https://doi.org/10.1109/cicc.2013.6658467","title":"A novel OTA-based fast lock PLL","display_name":"A novel OTA-based fast lock PLL","publication_year":2013,"publication_date":"2013-09-01","ids":{"openalex":"https://openalex.org/W2133111583","doi":"https://doi.org/10.1109/cicc.2013.6658467","mag":"2133111583"},"language":"en","primary_location":{"id":"doi:10.1109/cicc.2013.6658467","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cicc.2013.6658467","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the IEEE 2013 Custom Integrated Circuits Conference","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5048484263","display_name":"M.M. Amourah","orcid":null},"institutions":[{"id":"https://openalex.org/I4210127281","display_name":"Cypress Semiconductor Corporation (United States)","ror":"https://ror.org/02wpc5d77","country_code":"US","type":"company","lineage":["https://openalex.org/I4210127281"]},{"id":"https://openalex.org/I76610242","display_name":"Cypress Semiconductor Corporation (Japan)","ror":"https://ror.org/0561ky130","country_code":"JP","type":"company","lineage":["https://openalex.org/I4210127281","https://openalex.org/I76610242"]}],"countries":["JP","US"],"is_corresponding":false,"raw_author_name":"Mezyad Amourah","raw_affiliation_strings":["Cypress Semiconductor, San Jose, CA","[Cypress Semiconductor, San Jose, CA, USA]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Cypress Semiconductor, San Jose, CA","institution_ids":["https://openalex.org/I4210127281"]},{"raw_affiliation_string":"[Cypress Semiconductor, San Jose, CA, USA]","institution_ids":["https://openalex.org/I76610242"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110003223","display_name":"Sandeep Krishnegowda","orcid":null},"institutions":[{"id":"https://openalex.org/I4210127281","display_name":"Cypress Semiconductor Corporation (United States)","ror":"https://ror.org/02wpc5d77","country_code":"US","type":"company","lineage":["https://openalex.org/I4210127281"]},{"id":"https://openalex.org/I76610242","display_name":"Cypress Semiconductor Corporation (Japan)","ror":"https://ror.org/0561ky130","country_code":"JP","type":"company","lineage":["https://openalex.org/I4210127281","https://openalex.org/I76610242"]}],"countries":["JP","US"],"is_corresponding":false,"raw_author_name":"Sandeep Krishnegowda","raw_affiliation_strings":["Cypress Semiconductor, San Jose, CA","[Cypress Semiconductor, San Jose, CA, USA]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Cypress Semiconductor, San Jose, CA","institution_ids":["https://openalex.org/I4210127281"]},{"raw_affiliation_string":"[Cypress Semiconductor, San Jose, CA, USA]","institution_ids":["https://openalex.org/I76610242"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5041131828","display_name":"Morgan Whately","orcid":null},"institutions":[{"id":"https://openalex.org/I4210127281","display_name":"Cypress Semiconductor Corporation (United States)","ror":"https://ror.org/02wpc5d77","country_code":"US","type":"company","lineage":["https://openalex.org/I4210127281"]},{"id":"https://openalex.org/I76610242","display_name":"Cypress Semiconductor Corporation (Japan)","ror":"https://ror.org/0561ky130","country_code":"JP","type":"company","lineage":["https://openalex.org/I4210127281","https://openalex.org/I76610242"]}],"countries":["JP","US"],"is_corresponding":false,"raw_author_name":"Morgan Whately","raw_affiliation_strings":["Cypress Semiconductor, San Jose, CA","[Cypress Semiconductor, San Jose, CA, USA]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Cypress Semiconductor, San Jose, CA","institution_ids":["https://openalex.org/I4210127281"]},{"raw_affiliation_string":"[Cypress Semiconductor, San Jose, CA, USA]","institution_ids":["https://openalex.org/I76610242"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.25056114,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11444","display_name":"Electromagnetic Compatibility and Noise Suppression","score":0.9973000288009644,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9970999956130981,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.918766975402832},{"id":"https://openalex.org/keywords/lock","display_name":"Lock (firearm)","score":0.6576919555664062},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.6166567802429199},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5433349013328552},{"id":"https://openalex.org/keywords/pll-multibit","display_name":"PLL multibit","score":0.5202358961105347},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.5193608403205872},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4856611490249634},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.41046732664108276},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.4084615707397461},{"id":"https://openalex.org/keywords/phase-noise","display_name":"Phase noise","score":0.3124472498893738},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2624707818031311}],"concepts":[{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.918766975402832},{"id":"https://openalex.org/C174839445","wikidata":"https://www.wikidata.org/wiki/Q1134386","display_name":"Lock (firearm)","level":2,"score":0.6576919555664062},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.6166567802429199},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5433349013328552},{"id":"https://openalex.org/C77881186","wikidata":"https://www.wikidata.org/wiki/Q7119642","display_name":"PLL multibit","level":4,"score":0.5202358961105347},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.5193608403205872},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4856611490249634},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.41046732664108276},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.4084615707397461},{"id":"https://openalex.org/C89631360","wikidata":"https://www.wikidata.org/wiki/Q1428766","display_name":"Phase noise","level":2,"score":0.3124472498893738},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2624707818031311},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/cicc.2013.6658467","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cicc.2013.6658467","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the IEEE 2013 Custom Integrated Circuits Conference","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.7699999809265137,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W1560028049","https://openalex.org/W2114953806","https://openalex.org/W2126652127","https://openalex.org/W2153267648","https://openalex.org/W2153445207"],"related_works":["https://openalex.org/W1576949837","https://openalex.org/W984417604","https://openalex.org/W2498262093","https://openalex.org/W2474043983","https://openalex.org/W2544336511","https://openalex.org/W2566880546","https://openalex.org/W2078513307","https://openalex.org/W1978186604","https://openalex.org/W2144737022","https://openalex.org/W2124954209"],"abstract_inverted_index":{"This":[0],"paper":[1],"describes":[2],"a":[3,16,95],"novel":[4],"fast":[5,44,58],"lock":[6,28,59,92],"scheme":[7,14,38],"for":[8,48],"phase-locked":[9],"loops":[10],"(PLLs).":[11],"The":[12,36,74],"proposed":[13],"uses":[15],"simple":[17],"operational":[18],"transconductance":[19],"amplifier":[20],"(OTA)":[21],"to":[22,67,72],"achieve":[23],"significant":[24,88],"reduction":[25,89],"in":[26,63,90],"PLL":[27,33,91],"acquisition":[29],"time":[30,42],"without":[31],"affecting":[32],"noise":[34],"performance.":[35],"new":[37,57],"allows":[39],"short":[40],"starting":[41],"and":[43],"dynamic":[45],"power":[46],"cycling":[47],"various":[49],"subsystems":[50],"on":[51],"SOC's.":[52],"Multiple":[53],"PLLs":[54],"utilizing":[55],"the":[56],"schemes":[60],"were":[61],"implemented":[62],"multi-port":[64],"SRAM":[65],"chip":[66,75],"provide":[68],"frequencies":[69],"from":[70],"400MHz":[71],"1.6GHz,":[73],"was":[76],"fabricated":[77],"using":[78],"65nm":[79],"CMOS":[80],"process.":[81],"Silicon":[82],"measurements":[83],"across":[84],"corner":[85],"lots":[86],"show":[87],"time,":[93],"by":[94],"factor":[96],"of":[97],"6.5X,":[98],"over":[99],"device":[100],"operating":[101],"conditions.":[102]},"counts_by_year":[{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":1},{"year":2017,"cited_by_count":2}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
