{"id":"https://openalex.org/W2062396036","doi":"https://doi.org/10.1109/cicc.2012.6330683","title":"A 5-Gbps 1.7 pJ/bit ditherless CDR with optimal phase interval detection","display_name":"A 5-Gbps 1.7 pJ/bit ditherless CDR with optimal phase interval detection","publication_year":2012,"publication_date":"2012-09-01","ids":{"openalex":"https://openalex.org/W2062396036","doi":"https://doi.org/10.1109/cicc.2012.6330683","mag":"2062396036"},"language":"en","primary_location":{"id":"doi:10.1109/cicc.2012.6330683","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cicc.2012.6330683","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the IEEE 2012 Custom Integrated Circuits Conference","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5068862324","display_name":"Myeong-Jae Park","orcid":null},"institutions":[{"id":"https://openalex.org/I139264467","display_name":"Seoul National University","ror":"https://ror.org/04h9pn542","country_code":"KR","type":"education","lineage":["https://openalex.org/I139264467"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Myeong-Jae Park","raw_affiliation_strings":["Inter-university Semiconductor Research Center, Seoul National University, Seoul, South Korea","Inter-university Semiconductor Research Center, Seoul National University,Seoul,Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Inter-university Semiconductor Research Center, Seoul National University, Seoul, South Korea","institution_ids":["https://openalex.org/I139264467"]},{"raw_affiliation_string":"Inter-university Semiconductor Research Center, Seoul National University,Seoul,Korea","institution_ids":["https://openalex.org/I139264467"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5023646249","display_name":"Hanseok Kim","orcid":"https://orcid.org/0009-0007-4260-0556"},"institutions":[{"id":"https://openalex.org/I139264467","display_name":"Seoul National University","ror":"https://ror.org/04h9pn542","country_code":"KR","type":"education","lineage":["https://openalex.org/I139264467"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Hanseok Kim","raw_affiliation_strings":["Inter-university Semiconductor Research Center, Seoul National University, Seoul, South Korea","Inter-university Semiconductor Research Center, Seoul National University,Seoul,Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Inter-university Semiconductor Research Center, Seoul National University, Seoul, South Korea","institution_ids":["https://openalex.org/I139264467"]},{"raw_affiliation_string":"Inter-university Semiconductor Research Center, Seoul National University,Seoul,Korea","institution_ids":["https://openalex.org/I139264467"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5020187042","display_name":"Seuk Son","orcid":"https://orcid.org/0000-0003-4141-9425"},"institutions":[{"id":"https://openalex.org/I139264467","display_name":"Seoul National University","ror":"https://ror.org/04h9pn542","country_code":"KR","type":"education","lineage":["https://openalex.org/I139264467"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Seuk Son","raw_affiliation_strings":["Inter-university Semiconductor Research Center, Seoul National University, Seoul, South Korea","Inter-university Semiconductor Research Center, Seoul National University,Seoul,Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Inter-university Semiconductor Research Center, Seoul National University, Seoul, South Korea","institution_ids":["https://openalex.org/I139264467"]},{"raw_affiliation_string":"Inter-university Semiconductor Research Center, Seoul National University,Seoul,Korea","institution_ids":["https://openalex.org/I139264467"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5015393579","display_name":"Jaeha Kim","orcid":"https://orcid.org/0000-0003-2237-3134"},"institutions":[{"id":"https://openalex.org/I139264467","display_name":"Seoul National University","ror":"https://ror.org/04h9pn542","country_code":"KR","type":"education","lineage":["https://openalex.org/I139264467"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Jaeha Kim","raw_affiliation_strings":["Inter-university Semiconductor Research Center, Seoul National University, Seoul, South Korea","Inter-university Semiconductor Research Center, Seoul National University,Seoul,Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Inter-university Semiconductor Research Center, Seoul National University, Seoul, South Korea","institution_ids":["https://openalex.org/I139264467"]},{"raw_affiliation_string":"Inter-university Semiconductor Research Center, Seoul National University,Seoul,Korea","institution_ids":["https://openalex.org/I139264467"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I139264467"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9954000115394592,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10299","display_name":"Photonic and Optical Devices","score":0.9951000213623047,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.9110755920410156},{"id":"https://openalex.org/keywords/dither","display_name":"Dither","score":0.8152377605438232},{"id":"https://openalex.org/keywords/phase-detector","display_name":"Phase detector","score":0.6884878277778625},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6190757751464844},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5543726682662964},{"id":"https://openalex.org/keywords/detector","display_name":"Detector","score":0.46373310685157776},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4430508613586426},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.42954108119010925},{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.4285103678703308},{"id":"https://openalex.org/keywords/phase","display_name":"Phase (matter)","score":0.4177429974079132},{"id":"https://openalex.org/keywords/interval","display_name":"Interval (graph theory)","score":0.41587939858436584},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.21604430675506592},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.20761922001838684},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.14864397048950195},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1475442349910736},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.1291453242301941},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.11131995916366577}],"concepts":[{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.9110755920410156},{"id":"https://openalex.org/C70451592","wikidata":"https://www.wikidata.org/wiki/Q376493","display_name":"Dither","level":3,"score":0.8152377605438232},{"id":"https://openalex.org/C110086884","wikidata":"https://www.wikidata.org/wiki/Q2085341","display_name":"Phase detector","level":3,"score":0.6884878277778625},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6190757751464844},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5543726682662964},{"id":"https://openalex.org/C94915269","wikidata":"https://www.wikidata.org/wiki/Q1834857","display_name":"Detector","level":2,"score":0.46373310685157776},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4430508613586426},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.42954108119010925},{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.4285103678703308},{"id":"https://openalex.org/C44280652","wikidata":"https://www.wikidata.org/wiki/Q104837","display_name":"Phase (matter)","level":2,"score":0.4177429974079132},{"id":"https://openalex.org/C2778067643","wikidata":"https://www.wikidata.org/wiki/Q166507","display_name":"Interval (graph theory)","level":2,"score":0.41587939858436584},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.21604430675506592},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.20761922001838684},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.14864397048950195},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1475442349910736},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.1291453242301941},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.11131995916366577},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/cicc.2012.6330683","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cicc.2012.6330683","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the IEEE 2012 Custom Integrated Circuits Conference","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W2101101649","https://openalex.org/W2101597431","https://openalex.org/W2101940004","https://openalex.org/W2116902131","https://openalex.org/W2118721819","https://openalex.org/W2124354408","https://openalex.org/W2124390946","https://openalex.org/W2132897890","https://openalex.org/W2154332266","https://openalex.org/W2174322375","https://openalex.org/W6674933886"],"related_works":["https://openalex.org/W1994021281","https://openalex.org/W2139484866","https://openalex.org/W2295601265","https://openalex.org/W2148370333","https://openalex.org/W2936029881","https://openalex.org/W2096085680","https://openalex.org/W1978946573","https://openalex.org/W2908219865","https://openalex.org/W1153251241","https://openalex.org/W1576501709"],"abstract_inverted_index":{"Dithering":[0],"in":[1,60],"bang-bang":[2],"controlled":[3],"CDRs":[4],"poses":[5],"conflicting":[6],"requirements":[7],"on":[8],"the":[9,18,36,44,49,99],"phase":[10,26,33,46,78],"adjustment":[11,79],"resolution":[12],"as":[13],"one":[14],"tries":[15],"to":[16,42],"maximize":[17],"tracking":[19],"bandwidth":[20],"and":[21],"minimize":[22],"jitter.":[23],"A":[24,54],"novel":[25],"interval":[27,34],"detector":[28],"that":[29,47,64,96],"looks":[30],"for":[31],"a":[32,76,91],"enclosing":[35],"desired":[37],"lock":[38],"point":[39],"is":[40,103],"shown":[41],"find":[43],"optimal":[45],"minimizes":[48],"timing":[50],"error":[51],"without":[52],"dithering.":[53],"digitally-controlled,":[55],"phase-interpolating":[56],"DLL-based":[57],"CDR":[58],"fabricated":[59],"65nm":[61],"CMOS":[62],"demonstrates":[63],"it":[65],"can":[66,97],"achieve":[67],"low":[68],"jitter":[69,101],"of":[70,81],"41-mUI":[71],"<sub":[72],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[73],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">p-p</sub>":[74],"with":[75],"coarse":[77],"step":[80],"0.11-UI,":[82],"while":[83],"dissipating":[84],"only":[85],"8.4mW":[86],"at":[87],"5Gbps.":[88],"In":[89],"addition,":[90],"digitally-controlled":[92],"in-situ":[93],"measurement":[94],"circuit":[95],"characterize":[98],"CDR's":[100],"tolerance":[102],"presented.":[104]},"counts_by_year":[{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":2}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}
