{"id":"https://openalex.org/W2040936352","doi":"https://doi.org/10.1109/cicc.2012.6330679","title":"A mixed-mode FPAA SoC for analog-enhanced signal processing","display_name":"A mixed-mode FPAA SoC for analog-enhanced signal processing","publication_year":2012,"publication_date":"2012-09-01","ids":{"openalex":"https://openalex.org/W2040936352","doi":"https://doi.org/10.1109/cicc.2012.6330679","mag":"2040936352"},"language":"en","primary_location":{"id":"doi:10.1109/cicc.2012.6330679","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cicc.2012.6330679","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the IEEE 2012 Custom Integrated Circuits Conference","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5091068770","display_name":"Craig Schlottmann","orcid":null},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Craig Schlottmann","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","[School of Electrical and Computer Engineering Georgia, Institute of Technology Atlanta, Georgia]"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]},{"raw_affiliation_string":"[School of Electrical and Computer Engineering Georgia, Institute of Technology Atlanta, Georgia]","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5089127443","display_name":"Stephen Nease","orcid":null},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Stephen Nease","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","[School of Electrical and Computer Engineering Georgia, Institute of Technology Atlanta, Georgia]"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]},{"raw_affiliation_string":"[School of Electrical and Computer Engineering Georgia, Institute of Technology Atlanta, Georgia]","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5085487382","display_name":"Samuel Shapero","orcid":"https://orcid.org/0000-0002-7633-0183"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Samuel Shapero","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","[School of Electrical and Computer Engineering Georgia, Institute of Technology Atlanta, Georgia]"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]},{"raw_affiliation_string":"[School of Electrical and Computer Engineering Georgia, Institute of Technology Atlanta, Georgia]","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5105781337","display_name":"P. Hasler","orcid":null},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Paul Hasler","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","[School of Electrical and Computer Engineering Georgia, Institute of Technology Atlanta, Georgia]"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]},{"raw_affiliation_string":"[School of Electrical and Computer Engineering Georgia, Institute of Technology Atlanta, Georgia]","institution_ids":["https://openalex.org/I130701444"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5091068770"],"corresponding_institution_ids":["https://openalex.org/I130701444"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.10685283,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/reconfigurability","display_name":"Reconfigurability","score":0.8904585838317871},{"id":"https://openalex.org/keywords/field-programmable-analog-array","display_name":"Field-programmable analog array","score":0.7669210433959961},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5973407030105591},{"id":"https://openalex.org/keywords/analog-signal-processing","display_name":"Analog signal processing","score":0.5880803465843201},{"id":"https://openalex.org/keywords/arbitrary-waveform-generator","display_name":"Arbitrary waveform generator","score":0.528626561164856},{"id":"https://openalex.org/keywords/signal-processing","display_name":"Signal processing","score":0.5231320261955261},{"id":"https://openalex.org/keywords/analog-signal","display_name":"Analog signal","score":0.46012258529663086},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.4597089886665344},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.44935205578804016},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4461365044116974},{"id":"https://openalex.org/keywords/computation","display_name":"Computation","score":0.4410226047039032},{"id":"https://openalex.org/keywords/waveform","display_name":"Waveform","score":0.43873023986816406},{"id":"https://openalex.org/keywords/mixed-signal-integrated-circuit","display_name":"Mixed-signal integrated circuit","score":0.4211951494216919},{"id":"https://openalex.org/keywords/analog-image-processing","display_name":"Analog image processing","score":0.4210575222969055},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.4113761782646179},{"id":"https://openalex.org/keywords/signal-generator","display_name":"Signal generator","score":0.4082449674606323},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3578000068664551},{"id":"https://openalex.org/keywords/analog-multiplier","display_name":"Analog multiplier","score":0.2572075128555298},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.22319135069847107},{"id":"https://openalex.org/keywords/image-processing","display_name":"Image processing","score":0.20389074087142944},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.15537047386169434},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.1428043246269226},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.1412741243839264},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.13604772090911865},{"id":"https://openalex.org/keywords/digital-image-processing","display_name":"Digital image processing","score":0.13398683071136475},{"id":"https://openalex.org/keywords/image","display_name":"Image (mathematics)","score":0.09130454063415527}],"concepts":[{"id":"https://openalex.org/C2780149590","wikidata":"https://www.wikidata.org/wiki/Q7302742","display_name":"Reconfigurability","level":2,"score":0.8904585838317871},{"id":"https://openalex.org/C149128552","wikidata":"https://www.wikidata.org/wiki/Q380201","display_name":"Field-programmable analog array","level":5,"score":0.7669210433959961},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5973407030105591},{"id":"https://openalex.org/C379707","wikidata":"https://www.wikidata.org/wiki/Q2328303","display_name":"Analog signal processing","level":4,"score":0.5880803465843201},{"id":"https://openalex.org/C108307224","wikidata":"https://www.wikidata.org/wiki/Q629983","display_name":"Arbitrary waveform generator","level":4,"score":0.528626561164856},{"id":"https://openalex.org/C104267543","wikidata":"https://www.wikidata.org/wiki/Q208163","display_name":"Signal processing","level":3,"score":0.5231320261955261},{"id":"https://openalex.org/C13412647","wikidata":"https://www.wikidata.org/wiki/Q174948","display_name":"Analog signal","level":3,"score":0.46012258529663086},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.4597089886665344},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.44935205578804016},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4461365044116974},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.4410226047039032},{"id":"https://openalex.org/C197424946","wikidata":"https://www.wikidata.org/wiki/Q1165717","display_name":"Waveform","level":3,"score":0.43873023986816406},{"id":"https://openalex.org/C62907940","wikidata":"https://www.wikidata.org/wiki/Q1541329","display_name":"Mixed-signal integrated circuit","level":3,"score":0.4211951494216919},{"id":"https://openalex.org/C28525508","wikidata":"https://www.wikidata.org/wiki/Q4751054","display_name":"Analog image processing","level":5,"score":0.4210575222969055},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.4113761782646179},{"id":"https://openalex.org/C207912722","wikidata":"https://www.wikidata.org/wiki/Q1259123","display_name":"Signal generator","level":3,"score":0.4082449674606323},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3578000068664551},{"id":"https://openalex.org/C98142538","wikidata":"https://www.wikidata.org/wiki/Q485005","display_name":"Analog multiplier","level":4,"score":0.2572075128555298},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.22319135069847107},{"id":"https://openalex.org/C9417928","wikidata":"https://www.wikidata.org/wiki/Q1070689","display_name":"Image processing","level":3,"score":0.20389074087142944},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.15537047386169434},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.1428043246269226},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.1412741243839264},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.13604772090911865},{"id":"https://openalex.org/C104317675","wikidata":"https://www.wikidata.org/wiki/Q1070689","display_name":"Digital image processing","level":4,"score":0.13398683071136475},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.09130454063415527},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C554190296","wikidata":"https://www.wikidata.org/wiki/Q47528","display_name":"Radar","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/cicc.2012.6330679","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cicc.2012.6330679","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the IEEE 2012 Custom Integrated Circuits Conference","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.46000000834465027,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W2046857741","https://openalex.org/W2078878966","https://openalex.org/W2104794633","https://openalex.org/W2115129967","https://openalex.org/W2118249063","https://openalex.org/W2119640888","https://openalex.org/W2134007722","https://openalex.org/W2149992244","https://openalex.org/W2164092018","https://openalex.org/W6679703066"],"related_works":["https://openalex.org/W2061402905","https://openalex.org/W2005415695","https://openalex.org/W2111086519","https://openalex.org/W1489445348","https://openalex.org/W2053914166","https://openalex.org/W4233024123","https://openalex.org/W2156870451","https://openalex.org/W4309100299","https://openalex.org/W2040936352","https://openalex.org/W2169924428"],"abstract_inverted_index":{"We":[0,39],"present":[1],"the":[2],"RASP":[3],"2.9v,":[4],"an":[5,11,41,45],"FPAA":[6],"for":[7],"mixed-signal":[8],"computation":[9],"with":[10],"emphasis":[12],"on":[13],"enhanced":[14],"digital":[15,33],"support.":[16],"This":[17],"25mm":[18],"<sup":[19],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[20],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">2</sup>":[21],",":[22],"350nm":[23],"CMOS":[24],"chip":[25],"includes":[26],"on-chip":[27],"compilable":[28],"DACs,":[29],"dynamic":[30],"reconfigurability":[31],"and":[32,35,49],"storage,":[34],"76,000":[36],"programmable":[37],"elements.":[38],"demonstrate":[40],"analog":[42],"image-transform":[43],"processor,":[44],"arbitrary":[46],"waveform":[47],"generator,":[48],"a":[50],"mixed-mode":[51],"FIR":[52],"filter.":[53]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2017,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
