{"id":"https://openalex.org/W2074395052","doi":"https://doi.org/10.1109/cicc.2011.6055378","title":"Advances and challenges of computing with FPGAs","display_name":"Advances and challenges of computing with FPGAs","publication_year":2011,"publication_date":"2011-09-01","ids":{"openalex":"https://openalex.org/W2074395052","doi":"https://doi.org/10.1109/cicc.2011.6055378","mag":"2074395052"},"language":"en","primary_location":{"id":"doi:10.1109/cicc.2011.6055378","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cicc.2011.6055378","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 IEEE Custom Integrated Circuits Conference (CICC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5044520704","display_name":"John Wawrzynek","orcid":"https://orcid.org/0009-0003-1466-4553"},"institutions":[{"id":"https://openalex.org/I95457486","display_name":"University of California, Berkeley","ror":"https://ror.org/01an7q238","country_code":"US","type":"education","lineage":["https://openalex.org/I95457486"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"John Wawrzynek","raw_affiliation_strings":["University of California, Berkeley, USA","University of California\u2010Berkeley USA"],"affiliations":[{"raw_affiliation_string":"University of California, Berkeley, USA","institution_ids":["https://openalex.org/I95457486"]},{"raw_affiliation_string":"University of California\u2010Berkeley USA","institution_ids":["https://openalex.org/I95457486"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5044520704"],"corresponding_institution_ids":["https://openalex.org/I95457486"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.12131335,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"1"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9961000084877014,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9961000084877014,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9541000127792358,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.951200008392334,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7806017398834229},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7803159952163696},{"id":"https://openalex.org/keywords/variety","display_name":"Variety (cybernetics)","score":0.6492826342582703},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.635333776473999},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.571773111820221},{"id":"https://openalex.org/keywords/usability","display_name":"Usability","score":0.5487207174301147},{"id":"https://openalex.org/keywords/reconfigurable-computing","display_name":"Reconfigurable computing","score":0.5239971876144409},{"id":"https://openalex.org/keywords/signal-processing","display_name":"Signal processing","score":0.5218161940574646},{"id":"https://openalex.org/keywords/range","display_name":"Range (aeronautics)","score":0.4605388641357422},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3933568000793457},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.3840208947658539},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.32578548789024353},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.32075023651123047},{"id":"https://openalex.org/keywords/human\u2013computer-interaction","display_name":"Human\u2013computer interaction","score":0.2600061893463135},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.25538772344589233},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.1676577627658844},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.16116636991500854},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.12170326709747314},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.09269401431083679}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7806017398834229},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7803159952163696},{"id":"https://openalex.org/C136197465","wikidata":"https://www.wikidata.org/wiki/Q1729295","display_name":"Variety (cybernetics)","level":2,"score":0.6492826342582703},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.635333776473999},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.571773111820221},{"id":"https://openalex.org/C170130773","wikidata":"https://www.wikidata.org/wiki/Q216378","display_name":"Usability","level":2,"score":0.5487207174301147},{"id":"https://openalex.org/C142962650","wikidata":"https://www.wikidata.org/wiki/Q240838","display_name":"Reconfigurable computing","level":3,"score":0.5239971876144409},{"id":"https://openalex.org/C104267543","wikidata":"https://www.wikidata.org/wiki/Q208163","display_name":"Signal processing","level":3,"score":0.5218161940574646},{"id":"https://openalex.org/C204323151","wikidata":"https://www.wikidata.org/wiki/Q905424","display_name":"Range (aeronautics)","level":2,"score":0.4605388641357422},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3933568000793457},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.3840208947658539},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.32578548789024353},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.32075023651123047},{"id":"https://openalex.org/C107457646","wikidata":"https://www.wikidata.org/wiki/Q207434","display_name":"Human\u2013computer interaction","level":1,"score":0.2600061893463135},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.25538772344589233},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.1676577627658844},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.16116636991500854},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.12170326709747314},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.09269401431083679},{"id":"https://openalex.org/C146978453","wikidata":"https://www.wikidata.org/wiki/Q3798668","display_name":"Aerospace engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/cicc.2011.6055378","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cicc.2011.6055378","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 IEEE Custom Integrated Circuits Conference (CICC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W1612076744","https://openalex.org/W2126857316","https://openalex.org/W2152074211","https://openalex.org/W2129019972","https://openalex.org/W3164085601","https://openalex.org/W1522032972","https://openalex.org/W2113308450","https://openalex.org/W2139962137","https://openalex.org/W3139915793","https://openalex.org/W2340647897"],"abstract_inverted_index":{"The":[0,11,30],"primary":[1],"challenges":[2],"in":[3,33,77,92,97],"reconfigurable":[4,49],"computing":[5,62],"relate":[6],"to":[7,14,26],"ease":[8,45],"of":[9,46,48,54,61,84],"use.":[10],"usual":[12],"approach":[13],"mapping":[15],"an":[16,21],"application":[17,73],"for":[18,42,57],"execution":[19],"on":[20,51],"FPGA":[22],"has":[23,66],"been":[24,67],"equivalent":[25],"laborious":[27],"RTL":[28],"design.":[29],"research":[31,65],"presented":[32],"this":[34],"talk":[35],"will":[36],"highlight":[37],"our":[38],"experimentation":[39],"with":[40],"techniques":[41],"improving":[43],"the":[44],"use":[47],"devices":[50],"a":[52,58,70,82],"variety":[53],"fronts":[55],"and":[56,81,95],"wide":[59],"range":[60],"tasks.":[63],"This":[64],"driven":[68],"by":[69],"few":[71],"major":[72],"areas,":[74],"including":[75],"tasks":[76,87],"computer":[78],"system":[79],"simulation":[80],"set":[83],"compute":[85],"intensive":[86],"drawn":[88],"from":[89],"signal":[90],"processing":[91],"radio":[93],"astronomy":[94],"data-processing":[96],"systems":[98],"biology.":[99]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}