{"id":"https://openalex.org/W2162977588","doi":"https://doi.org/10.1109/cicc.2011.6055344","title":"Wafer-specific centering of compact transistor model parameters for advanced technologies and models","display_name":"Wafer-specific centering of compact transistor model parameters for advanced technologies and models","publication_year":2011,"publication_date":"2011-09-01","ids":{"openalex":"https://openalex.org/W2162977588","doi":"https://doi.org/10.1109/cicc.2011.6055344","mag":"2162977588"},"language":"en","primary_location":{"id":"doi:10.1109/cicc.2011.6055344","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cicc.2011.6055344","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 IEEE Custom Integrated Circuits Conference (CICC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5113159051","display_name":"Bart de Vries","orcid":null},"institutions":[{"id":"https://openalex.org/I109147379","display_name":"NXP (Netherlands)","ror":"https://ror.org/059be4e97","country_code":"NL","type":"company","lineage":["https://openalex.org/I109147379"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"B. De Vries","raw_affiliation_strings":["NXP Central Research and Development, Research, Eindhoven, Netherlands"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"NXP Central Research and Development, Research, Eindhoven, Netherlands","institution_ids":["https://openalex.org/I109147379"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5070534850","display_name":"A.J. Scholten","orcid":"https://orcid.org/0000-0003-1861-883X"},"institutions":[{"id":"https://openalex.org/I109147379","display_name":"NXP (Netherlands)","ror":"https://ror.org/059be4e97","country_code":"NL","type":"company","lineage":["https://openalex.org/I109147379"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"A.J. Scholten","raw_affiliation_strings":["NXP Central Research and Development, Research, Eindhoven, Netherlands"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"NXP Central Research and Development, Research, Eindhoven, Netherlands","institution_ids":["https://openalex.org/I109147379"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5017072839","display_name":"P.F.E. Rommers","orcid":null},"institutions":[{"id":"https://openalex.org/I109147379","display_name":"NXP (Netherlands)","ror":"https://ror.org/059be4e97","country_code":"NL","type":"company","lineage":["https://openalex.org/I109147379"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"P.F.E. Rommers","raw_affiliation_strings":["NXP Central Research and Development, Foundation Technology, Nijmegen, Netherlands"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"NXP Central Research and Development, Foundation Technology, Nijmegen, Netherlands","institution_ids":["https://openalex.org/I109147379"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5000954209","display_name":"M. Stoutjesdijk","orcid":null},"institutions":[{"id":"https://openalex.org/I109147379","display_name":"NXP (Netherlands)","ror":"https://ror.org/059be4e97","country_code":"NL","type":"company","lineage":["https://openalex.org/I109147379"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"M. Stoutjesdijk","raw_affiliation_strings":["NXP Central Research and Development, Foundation Technology, Nijmegen, Netherlands"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"NXP Central Research and Development, Foundation Technology, Nijmegen, Netherlands","institution_ids":["https://openalex.org/I109147379"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5113606468","display_name":"D.B.M. Klaassen","orcid":null},"institutions":[{"id":"https://openalex.org/I109147379","display_name":"NXP (Netherlands)","ror":"https://ror.org/059be4e97","country_code":"NL","type":"company","lineage":["https://openalex.org/I109147379"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"D.B.M. Klaassen","raw_affiliation_strings":["NXP Central Research and Development, Research, Eindhoven, Netherlands"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"NXP Central Research and Development, Research, Eindhoven, Netherlands","institution_ids":["https://openalex.org/I109147379"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I109147379"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.16927827,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9977999925613403,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/wafer","display_name":"Wafer","score":0.7734960317611694},{"id":"https://openalex.org/keywords/spice","display_name":"Spice","score":0.7334784865379333},{"id":"https://openalex.org/keywords/semiconductor-device-modeling","display_name":"Semiconductor device modeling","score":0.5793367028236389},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.5279873013496399},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4979090690612793},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.4898516833782196},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4829927682876587},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.42734280228614807},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.343317449092865},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2553948163986206},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.21097543835639954},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.20562610030174255},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.1485675871372223},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.14020711183547974}],"concepts":[{"id":"https://openalex.org/C160671074","wikidata":"https://www.wikidata.org/wiki/Q267131","display_name":"Wafer","level":2,"score":0.7734960317611694},{"id":"https://openalex.org/C2780077345","wikidata":"https://www.wikidata.org/wiki/Q16891888","display_name":"Spice","level":2,"score":0.7334784865379333},{"id":"https://openalex.org/C4775677","wikidata":"https://www.wikidata.org/wiki/Q7449393","display_name":"Semiconductor device modeling","level":3,"score":0.5793367028236389},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.5279873013496399},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4979090690612793},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.4898516833782196},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4829927682876587},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.42734280228614807},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.343317449092865},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2553948163986206},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.21097543835639954},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.20562610030174255},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.1485675871372223},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.14020711183547974},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/cicc.2011.6055344","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cicc.2011.6055344","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 IEEE Custom Integrated Circuits Conference (CICC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.4699999988079071,"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W1678490620","https://openalex.org/W2111870521","https://openalex.org/W4229627167","https://openalex.org/W6637125667","https://openalex.org/W6831242623"],"related_works":["https://openalex.org/W2108167458","https://openalex.org/W2945285759","https://openalex.org/W4399527091","https://openalex.org/W2798321569","https://openalex.org/W4396689053","https://openalex.org/W2057436168","https://openalex.org/W2615278662","https://openalex.org/W1989032443","https://openalex.org/W2228479887","https://openalex.org/W3017875478"],"abstract_inverted_index":{"In":[0],"the":[1,19,27,48,57,103],"early":[2],"stages":[3],"of":[4,85],"IC":[5],"development,":[6],"only":[7],"very":[8,32],"few":[9],"circuit":[10,20],"measurements":[11,38,127],"are":[12],"available.":[13],"To":[14],"build":[15],"up":[16],"confidence":[17],"in":[18,26],"simulations":[21],"and":[22,66,97,133],"to":[23,46,60,73,93,102,120,125],"detect":[24],"omissions":[25],"simulation":[28],"chain,":[29],"it":[30,69],"is":[31,70,109],"advantageous":[33],"if":[34],"process-control":[35],"module":[36],"(PCM)":[37],"from":[39,81],"a":[40,76,82,116,129],"specific":[41],"wafer":[42],"can":[43],"be":[44],"used":[45],"center":[47],"nominal":[49],"compact":[50,67,77,99,122],"(SPICE)":[51],"model":[52,78,123,132],"parameter":[53,79],"set":[54,80],"(measured":[55],"on":[56],"`golden'":[58],"wafer)":[59],"this":[61,106],"wafer.":[62],"For":[63],"older":[64],"technologies":[65,91],"models":[68,100],"often":[71],"possible":[72],"directly":[74],"calculate":[75],"limited":[83],"amount":[84],"PCM":[86,126],"measurements.":[87],"However,":[88],"for":[89,128],"advanced":[90,98,135],"(due":[92,101],"e.g.":[94],"pocket":[95],"implants)":[96],"surface-potential":[104,130],"formulation)":[105],"`direct":[107],"calculation'":[108],"no":[110],"longer":[111],"possible.":[112],"Here,":[113],"we":[114],"present":[115],"novel":[117],"alternative":[118],"method":[119],"connect":[121],"parameters":[124],"based":[131],"an":[134],"process":[136],"technology.":[137]},"counts_by_year":[],"updated_date":"2026-06-26T08:34:08.712188","created_date":"2025-10-10T00:00:00"}