{"id":"https://openalex.org/W2078592243","doi":"https://doi.org/10.1109/cicc.2010.5617473","title":"Interpolated VCO design for a low bandwidth, low-jitter, self-biased PLL in 45 nm CMOS","display_name":"Interpolated VCO design for a low bandwidth, low-jitter, self-biased PLL in 45 nm CMOS","publication_year":2010,"publication_date":"2010-09-01","ids":{"openalex":"https://openalex.org/W2078592243","doi":"https://doi.org/10.1109/cicc.2010.5617473","mag":"2078592243"},"language":"en","primary_location":{"id":"doi:10.1109/cicc.2010.5617473","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cicc.2010.5617473","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Custom Integrated Circuits Conference 2010","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101664947","display_name":"D. Duarte","orcid":"https://orcid.org/0000-0001-8846-0324"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"D. Duarte","raw_affiliation_strings":["Logic Technology Development, Intel Corporation, Hillsboro, OR, USA","Logic Technology Development, Intel Corporation, Hillsboro, OR 97124, USA#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Logic Technology Development, Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Logic Technology Development, Intel Corporation, Hillsboro, OR 97124, USA#TAB#","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5021456532","display_name":"Shawn S. H. Hsu","orcid":"https://orcid.org/0000-0002-0910-7096"},"institutions":[{"id":"https://openalex.org/I19268510","display_name":"Qualcomm (United Kingdom)","ror":"https://ror.org/04d3djg48","country_code":"GB","type":"company","lineage":["https://openalex.org/I19268510","https://openalex.org/I4210087596"]},{"id":"https://openalex.org/I4210087596","display_name":"Qualcomm (United States)","ror":"https://ror.org/002zrf773","country_code":"US","type":"company","lineage":["https://openalex.org/I4210087596"]}],"countries":["GB","US"],"is_corresponding":false,"raw_author_name":"S. Hsu","raw_affiliation_strings":["Qualcomm, Inc., San Diego, CA, USA","[Qualcomm, San Diego, CA, USA]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Qualcomm, Inc., San Diego, CA, USA","institution_ids":["https://openalex.org/I4210087596"]},{"raw_affiliation_string":"[Qualcomm, San Diego, CA, USA]","institution_ids":["https://openalex.org/I19268510"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109191251","display_name":"K.L. Wong","orcid":null},"institutions":[{"id":"https://openalex.org/I4210143161","display_name":"IDEX Corporation (United States)","ror":"https://ror.org/03jqyh750","country_code":"US","type":"company","lineage":["https://openalex.org/I4210143161"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"K. Wong","raw_affiliation_strings":["Inax Corporation, Beaverton, OR, USA","Anax Corporation, Beaverton, OR USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Inax Corporation, Beaverton, OR, USA","institution_ids":[]},{"raw_affiliation_string":"Anax Corporation, Beaverton, OR USA","institution_ids":["https://openalex.org/I4210143161"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5090196339","display_name":"Mengyuan Huang","orcid":"https://orcid.org/0000-0002-4093-6992"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"M. Huang","raw_affiliation_strings":["Logic Technology Development, Intel Corporation, Hillsboro, OR, USA","Logic Technology Development, Intel Corporation, Hillsboro, OR 97124, USA#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Logic Technology Development, Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Logic Technology Development, Intel Corporation, Hillsboro, OR 97124, USA#TAB#","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5113819120","display_name":"G. Taylor","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"G. Taylor","raw_affiliation_strings":["Logic Technology Development, Intel Corporation, Hillsboro, OR, USA","Logic Technology Development, Intel Corporation, Hillsboro, OR 97124, USA#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Logic Technology Development, Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Logic Technology Development, Intel Corporation, Hillsboro, OR 97124, USA#TAB#","institution_ids":["https://openalex.org/I1343180700"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":5,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.5885,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.72775886,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9945999979972839,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11429","display_name":"Semiconductor Lasers and Optical Devices","score":0.9945999979972839,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.8574806451797485},{"id":"https://openalex.org/keywords/voltage-controlled-oscillator","display_name":"Voltage-controlled oscillator","score":0.7953973412513733},{"id":"https://openalex.org/keywords/phase-noise","display_name":"Phase noise","score":0.7146568298339844},{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.7025595307350159},{"id":"https://openalex.org/keywords/ring-oscillator","display_name":"Ring oscillator","score":0.6519712209701538},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.6105037927627563},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5935975313186646},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5834314227104187},{"id":"https://openalex.org/keywords/inverter","display_name":"Inverter","score":0.5376478433609009},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5002865791320801},{"id":"https://openalex.org/keywords/charge-pump","display_name":"Charge pump","score":0.44385725259780884},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3706108331680298},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.23591867089271545},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.22198250889778137},{"id":"https://openalex.org/keywords/capacitor","display_name":"Capacitor","score":0.17370733618736267},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.11818316578865051}],"concepts":[{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.8574806451797485},{"id":"https://openalex.org/C5291336","wikidata":"https://www.wikidata.org/wiki/Q852341","display_name":"Voltage-controlled oscillator","level":3,"score":0.7953973412513733},{"id":"https://openalex.org/C89631360","wikidata":"https://www.wikidata.org/wiki/Q1428766","display_name":"Phase noise","level":2,"score":0.7146568298339844},{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.7025595307350159},{"id":"https://openalex.org/C104111718","wikidata":"https://www.wikidata.org/wiki/Q2153973","display_name":"Ring oscillator","level":3,"score":0.6519712209701538},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.6105037927627563},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5935975313186646},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5834314227104187},{"id":"https://openalex.org/C11190779","wikidata":"https://www.wikidata.org/wiki/Q664575","display_name":"Inverter","level":3,"score":0.5376478433609009},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5002865791320801},{"id":"https://openalex.org/C114825011","wikidata":"https://www.wikidata.org/wiki/Q440704","display_name":"Charge pump","level":4,"score":0.44385725259780884},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3706108331680298},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.23591867089271545},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.22198250889778137},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.17370733618736267},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.11818316578865051}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/cicc.2010.5617473","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cicc.2010.5617473","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Custom Integrated Circuits Conference 2010","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.6499999761581421,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":4,"referenced_works":["https://openalex.org/W1560028049","https://openalex.org/W2114953806","https://openalex.org/W2172440946","https://openalex.org/W4242161270"],"related_works":["https://openalex.org/W2976219355","https://openalex.org/W2139484866","https://openalex.org/W2089131288","https://openalex.org/W1486070987","https://openalex.org/W2511498111","https://openalex.org/W3064661991","https://openalex.org/W66112532","https://openalex.org/W4384502435","https://openalex.org/W4385624389","https://openalex.org/W1600405202"],"abstract_inverted_index":{"A":[0],"novel":[1],"self-biased":[2],"PLL":[3],"design":[4],"incorporating":[5],"a":[6,65],"low-gain":[7],"interpolated":[8],"inverter-based":[9],"ring":[10],"oscillator":[11],"VCO":[12],"accomplishes":[13],"several":[14],"improvements":[15],"for":[16,54],"general":[17],"purpose":[18],"clock":[19,37],"generation,":[20],"namely":[21],"lower":[22,25],"bandwidth":[23,55],"and":[24,27,35,44],"short":[26],"medium-term":[28],"accumulation":[29],"jitter":[30],"due":[31],"to":[32],"thermal":[33],"noise":[34],"reference":[36],"noise,":[38],"while":[39],"not":[40],"sacrificing":[41],"PSRR,":[42],"area,":[43],"PVT":[45],"insensitivity.":[46],"Charge":[47],"pump":[48],"programmability":[49],"provides":[50],"an":[51],"effective":[52],"mechanism":[53],"adjustments":[56],"without":[57],"requiring":[58],"large":[59],"circuit":[60],"duplicates.":[61],"Data":[62],"collected":[63],"on":[64],"high-k,":[66],"metal":[67],"gate":[68],"45":[69],"nm":[70],"process":[71],"confirms":[72],"the":[73,76],"suitability":[74],"of":[75],"proposed":[77],"scheme.":[78]},"counts_by_year":[{"year":2019,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2013,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
