{"id":"https://openalex.org/W2060939056","doi":"https://doi.org/10.1109/cicc.2010.5617433","title":"A 1.56GHz wide-tuning all digital FBAR-based PLL in 0.13µm CMOS","display_name":"A 1.56GHz wide-tuning all digital FBAR-based PLL in 0.13µm CMOS","publication_year":2010,"publication_date":"2010-09-01","ids":{"openalex":"https://openalex.org/W2060939056","doi":"https://doi.org/10.1109/cicc.2010.5617433","mag":"2060939056"},"language":"en","primary_location":{"id":"doi:10.1109/cicc.2010.5617433","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cicc.2010.5617433","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Custom Integrated Circuits Conference 2010","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101091313","display_name":"Julie Hu","orcid":null},"institutions":[{"id":"https://openalex.org/I201448701","display_name":"University of Washington","ror":"https://ror.org/00cvxb145","country_code":"US","type":"education","lineage":["https://openalex.org/I201448701"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Julie R. Hu","raw_affiliation_strings":["Department of Electrical Engineering, University of Washington, Seattle, WA, USA","Department of Electrical Engineering, University of Washington, Seattle, 98195-2500 USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, University of Washington, Seattle, WA, USA","institution_ids":["https://openalex.org/I201448701"]},{"raw_affiliation_string":"Department of Electrical Engineering, University of Washington, Seattle, 98195-2500 USA","institution_ids":["https://openalex.org/I201448701"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5108427484","display_name":"Richard Ruby","orcid":null},"institutions":[{"id":"https://openalex.org/I4210127325","display_name":"Broadcom (United States)","ror":"https://ror.org/035gt5s03","country_code":"US","type":"company","lineage":["https://openalex.org/I4210127325"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Richard C. Ruby","raw_affiliation_strings":["Avago Technologies, Inc., San Jose, CA, USA","Avago Technologies, Inc., San Jose, CA 95131-1008, USA"],"affiliations":[{"raw_affiliation_string":"Avago Technologies, Inc., San Jose, CA, USA","institution_ids":["https://openalex.org/I4210127325"]},{"raw_affiliation_string":"Avago Technologies, Inc., San Jose, CA 95131-1008, USA","institution_ids":["https://openalex.org/I4210127325"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5023910654","display_name":"A. Otis","orcid":null},"institutions":[{"id":"https://openalex.org/I201448701","display_name":"University of Washington","ror":"https://ror.org/00cvxb145","country_code":"US","type":"education","lineage":["https://openalex.org/I201448701"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"and Brian P. Otis","raw_affiliation_strings":["Department of Electrical Engineering, University of Washington, Seattle, WA, USA","Department of Electrical Engineering, University of Washington, Seattle, 98195-2500 USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, University of Washington, Seattle, WA, USA","institution_ids":["https://openalex.org/I201448701"]},{"raw_affiliation_string":"Department of Electrical Engineering, University of Washington, Seattle, 98195-2500 USA","institution_ids":["https://openalex.org/I201448701"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5101091313"],"corresponding_institution_ids":["https://openalex.org/I201448701"],"apc_list":null,"apc_paid":null,"fwci":1.1546,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.80796089,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10299","display_name":"Photonic and Optical Devices","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.8281863927841187},{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.8044734597206116},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.682382345199585},{"id":"https://openalex.org/keywords/phase-noise","display_name":"Phase noise","score":0.6781718730926514},{"id":"https://openalex.org/keywords/digitally-controlled-oscillator","display_name":"Digitally controlled oscillator","score":0.6267807483673096},{"id":"https://openalex.org/keywords/voltage-controlled-oscillator","display_name":"Voltage-controlled oscillator","score":0.5026311874389648},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.494384765625},{"id":"https://openalex.org/keywords/capacitor","display_name":"Capacitor","score":0.4887416362762451},{"id":"https://openalex.org/keywords/pll-multibit","display_name":"PLL multibit","score":0.4250038266181946},{"id":"https://openalex.org/keywords/frequency-synthesizer","display_name":"Frequency synthesizer","score":0.4236098527908325},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.4121941328048706},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3707770109176636},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.20425289869308472},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.20231926441192627},{"id":"https://openalex.org/keywords/variable-frequency-oscillator","display_name":"Variable-frequency oscillator","score":0.18164899945259094}],"concepts":[{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.8281863927841187},{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.8044734597206116},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.682382345199585},{"id":"https://openalex.org/C89631360","wikidata":"https://www.wikidata.org/wiki/Q1428766","display_name":"Phase noise","level":2,"score":0.6781718730926514},{"id":"https://openalex.org/C167872736","wikidata":"https://www.wikidata.org/wiki/Q5276224","display_name":"Digitally controlled oscillator","level":5,"score":0.6267807483673096},{"id":"https://openalex.org/C5291336","wikidata":"https://www.wikidata.org/wiki/Q852341","display_name":"Voltage-controlled oscillator","level":3,"score":0.5026311874389648},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.494384765625},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.4887416362762451},{"id":"https://openalex.org/C77881186","wikidata":"https://www.wikidata.org/wiki/Q7119642","display_name":"PLL multibit","level":4,"score":0.4250038266181946},{"id":"https://openalex.org/C182099602","wikidata":"https://www.wikidata.org/wiki/Q2660678","display_name":"Frequency synthesizer","level":4,"score":0.4236098527908325},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.4121941328048706},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3707770109176636},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.20425289869308472},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.20231926441192627},{"id":"https://openalex.org/C120164764","wikidata":"https://www.wikidata.org/wiki/Q705396","display_name":"Variable-frequency oscillator","level":4,"score":0.18164899945259094}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/cicc.2010.5617433","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cicc.2010.5617433","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Custom Integrated Circuits Conference 2010","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.8799999952316284}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":20,"referenced_works":["https://openalex.org/W1971833376","https://openalex.org/W1992141418","https://openalex.org/W2038643681","https://openalex.org/W2053503063","https://openalex.org/W2097415148","https://openalex.org/W2099913287","https://openalex.org/W2113414268","https://openalex.org/W2136275771","https://openalex.org/W2141394140","https://openalex.org/W2145361466","https://openalex.org/W2145966484","https://openalex.org/W2160412553","https://openalex.org/W2162504624","https://openalex.org/W2172587493","https://openalex.org/W2177833654","https://openalex.org/W2178610490","https://openalex.org/W2565038058","https://openalex.org/W4285719527","https://openalex.org/W6674813612","https://openalex.org/W6675311876"],"related_works":["https://openalex.org/W2218086155","https://openalex.org/W2898654478","https://openalex.org/W2128445318","https://openalex.org/W2130012952","https://openalex.org/W2301158783","https://openalex.org/W4281992395","https://openalex.org/W2184070934","https://openalex.org/W2779702701","https://openalex.org/W4235367105","https://openalex.org/W2049340954"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"the":[3,61,65,106,109,126],"design":[4],"rationale":[5],"and":[6,46,81,93,115],"measured":[7],"results":[8],"of":[9,35,44,49,112,120,140],"a":[10,30,41,70,87,130,138],"low":[11,13,141],"power,":[12,142],"jitter,":[14],"PVT-stable":[15],"FBAR-based":[16],"RF":[17,134],"synthesizer":[18],"implemented":[19],"in":[20],"0.13\u00b5m":[21],"CMOS.":[22],"A":[23],"digitally":[24],"controlled":[25],"FBAR":[26,62,127],"oscillator,":[27],"tuned":[28],"with":[29],"switched-capacitor":[31],"array,":[32],"provides":[33,129],"5800ppm":[34],"frequency":[36,135],"tuning,":[37],"sufficient":[38],"to":[39,59,75,99,124],"cover":[40],"wide":[42],"range":[43,139],"manufacturing":[45],"temperature":[47],"variations":[48],"an":[50,116],"FBAR.":[51],"An":[52],"all-digital":[53],"phase-locked":[54],"loop":[55],"(ADPLL)":[56],"is":[57],"used":[58,98],"stabilize":[60],"DCO.":[63],"In":[64],"ADPLL":[66,128],"architecture,":[67],"we":[68],"introduce":[69],"two-stage":[71],"time-to-digital":[72],"converter":[73],"(TDC)":[74],"detect":[76],"phase":[77,102],"differences":[78],"between":[79],"reference":[80,136],"divider":[82],"clocks.":[83],"The":[84],"solution":[85],"offers":[86],"fine":[88],"TDC":[89,95],"resolution":[90],"without":[91],"large":[92],"power-hungry":[94],"circuitry":[96],"typically":[97],"address":[100],"in-band":[101],"noise":[103],"requirements.":[104],"With":[105],"tuning":[107],"range,":[108],"power":[110],"consumption":[111],"2.8":[113],"mW,":[114],"integrated":[117],"RMS":[118],"jitter":[119],"0.38ps":[121],"from":[122],"10kHz":[123],"20MHz,":[125],"PVT-stable,":[131],"high":[132,143],"quality":[133],"for":[137],"data":[144],"rate":[145],"applications.":[146]},"counts_by_year":[{"year":2017,"cited_by_count":1},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}