{"id":"https://openalex.org/W2113130139","doi":"https://doi.org/10.1109/cicc.2009.5280877","title":"Embedded high-speed BCH decoder for new-generation NOR flash memories","display_name":"Embedded high-speed BCH decoder for new-generation NOR flash memories","publication_year":2009,"publication_date":"2009-09-01","ids":{"openalex":"https://openalex.org/W2113130139","doi":"https://doi.org/10.1109/cicc.2009.5280877","mag":"2113130139"},"language":"en","primary_location":{"id":"doi:10.1109/cicc.2009.5280877","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cicc.2009.5280877","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 IEEE Custom Integrated Circuits Conference","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101479439","display_name":"Xueqiang Wang","orcid":"https://orcid.org/0000-0002-9038-4460"},"institutions":[{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]},{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xueqiang Wang","raw_affiliation_strings":["Institute of Microelectronics, Tsinghua University, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics, Tsinghua University, China","institution_ids":["https://openalex.org/I4210119392","https://openalex.org/I99065089"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103200805","display_name":"Dong Wu","orcid":"https://orcid.org/0000-0002-2306-5769"},"institutions":[{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]},{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Dong Wu","raw_affiliation_strings":["Institute of Microelectronics, Tsinghua University, China","Tsinghua National Laboratory for Information Science and Technology, Beijing, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics, Tsinghua University, China","institution_ids":["https://openalex.org/I4210119392","https://openalex.org/I99065089"]},{"raw_affiliation_string":"Tsinghua National Laboratory for Information Science and Technology, Beijing, China","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102147395","display_name":"Chaohong Hu","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Chaohong Hu","raw_affiliation_strings":["Intel Technology Development (Shanghai) Company Limited, Shanghai, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Technology Development (Shanghai) Company Limited, Shanghai, China","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102144520","display_name":"Liyang Pan","orcid":null},"institutions":[{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]},{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Liyang Pan","raw_affiliation_strings":["Institute of Microelectronics, Tsinghua University, China","Tsinghua National Laboratory for Information Science and Technology, Beijing, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics, Tsinghua University, China","institution_ids":["https://openalex.org/I4210119392","https://openalex.org/I99065089"]},{"raw_affiliation_string":"Tsinghua National Laboratory for Information Science and Technology, Beijing, China","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100941945","display_name":"Zhou Runde","orcid":null},"institutions":[{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]},{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Runde Zhou","raw_affiliation_strings":["Institute of Microelectronics, Tsinghua University, China","Tsinghua National Laboratory for Information Science and Technology, Beijing, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics, Tsinghua University, China","institution_ids":["https://openalex.org/I4210119392","https://openalex.org/I99065089"]},{"raw_affiliation_string":"Tsinghua National Laboratory for Information Science and Technology, Beijing, China","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":8,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"195","last_page":"198"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9968000054359436,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/bch-code","display_name":"BCH code","score":0.930686354637146},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7729456424713135},{"id":"https://openalex.org/keywords/decoding-methods","display_name":"Decoding methods","score":0.6980100870132446},{"id":"https://openalex.org/keywords/flash","display_name":"Flash (photography)","score":0.6435108780860901},{"id":"https://openalex.org/keywords/soft-decision-decoder","display_name":"Soft-decision decoder","score":0.6390213966369629},{"id":"https://openalex.org/keywords/flash-memory","display_name":"Flash memory","score":0.5060901045799255},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.48633772134780884},{"id":"https://openalex.org/keywords/error-detection-and-correction","display_name":"Error detection and correction","score":0.4592139720916748},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4487548768520355},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4439467191696167},{"id":"https://openalex.org/keywords/multiplication","display_name":"Multiplication (music)","score":0.42979252338409424},{"id":"https://openalex.org/keywords/speedup","display_name":"Speedup","score":0.4234459400177002},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.4155960977077484},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.41078630089759827},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.24032041430473328},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.12471193075180054},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.09250488877296448},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.0867169201374054}],"concepts":[{"id":"https://openalex.org/C42276685","wikidata":"https://www.wikidata.org/wiki/Q795705","display_name":"BCH code","level":3,"score":0.930686354637146},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7729456424713135},{"id":"https://openalex.org/C57273362","wikidata":"https://www.wikidata.org/wiki/Q576722","display_name":"Decoding methods","level":2,"score":0.6980100870132446},{"id":"https://openalex.org/C2777526259","wikidata":"https://www.wikidata.org/wiki/Q221836","display_name":"Flash (photography)","level":2,"score":0.6435108780860901},{"id":"https://openalex.org/C185588885","wikidata":"https://www.wikidata.org/wiki/Q7553811","display_name":"Soft-decision decoder","level":3,"score":0.6390213966369629},{"id":"https://openalex.org/C2776531357","wikidata":"https://www.wikidata.org/wiki/Q174077","display_name":"Flash memory","level":2,"score":0.5060901045799255},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.48633772134780884},{"id":"https://openalex.org/C103088060","wikidata":"https://www.wikidata.org/wiki/Q1062839","display_name":"Error detection and correction","level":2,"score":0.4592139720916748},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4487548768520355},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4439467191696167},{"id":"https://openalex.org/C2780595030","wikidata":"https://www.wikidata.org/wiki/Q3860309","display_name":"Multiplication (music)","level":2,"score":0.42979252338409424},{"id":"https://openalex.org/C68339613","wikidata":"https://www.wikidata.org/wiki/Q1549489","display_name":"Speedup","level":2,"score":0.4234459400177002},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.4155960977077484},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.41078630089759827},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.24032041430473328},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.12471193075180054},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.09250488877296448},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0867169201374054},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/cicc.2009.5280877","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cicc.2009.5280877","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 IEEE Custom Integrated Circuits Conference","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W1533071485","https://openalex.org/W2101380322","https://openalex.org/W2119529071","https://openalex.org/W2120173944","https://openalex.org/W2124799219","https://openalex.org/W2138472804","https://openalex.org/W2537224236"],"related_works":["https://openalex.org/W1974357939","https://openalex.org/W3144457048","https://openalex.org/W2052237030","https://openalex.org/W3172524400","https://openalex.org/W1723747798","https://openalex.org/W2520086010","https://openalex.org/W2121197955","https://openalex.org/W2313229959","https://openalex.org/W3124649878","https://openalex.org/W4246398676"],"abstract_inverted_index":{"A":[0],"high-speed":[1],"double-error-correcting":[2],"(DEC)":[3],"BCH":[4,65],"decoder":[5,66],"for":[6],"new-generation":[7],"NOR":[8],"flash":[9],"memory":[10],"is":[11,26,67,72],"presented":[12],"to":[13,28,48,75],"improve":[14],"reliability.":[15],"To":[16],"speed":[17],"up":[18],"the":[19,52,63,70],"decoding":[20],"process,":[21,62],"a":[22,37],"multiplication-free":[23],"linear":[24],"transform":[25],"developed":[27],"eliminate":[29],"iterations":[30],"and":[31,42,69],"divisions":[32],"in":[33,51],"Galois":[34],"fields.":[35],"Furthermore,":[36],"reverse":[38],"data-flow":[39],"analysis":[40],"(RDFA)":[41],"smoothest":[43],"descent":[44],"approach":[45],"are":[46],"proposed":[47],"reduce":[49],"latency":[50,71],"bit-parallel":[53],"Chien":[54],"search.":[55],"Based":[56],"on":[57],"peripheral":[58],"180":[59],"nm":[60],"CMOS":[61],"whole":[64],"designed":[68],"significantly":[73],"reduced":[74],"less":[76],"than":[77],"5":[78],"ns.":[79]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2014,"cited_by_count":1},{"year":2012,"cited_by_count":2}],"updated_date":"2026-07-22T07:51:19.307946","created_date":"2025-10-10T00:00:00"}