{"id":"https://openalex.org/W2100771209","doi":"https://doi.org/10.1109/cicc.2008.4672144","title":"A DC-DC converter with a dual VCDL-based ADC and a self-calibrated DLL-based clock generator for an energy-aware EISC processor","display_name":"A DC-DC converter with a dual VCDL-based ADC and a self-calibrated DLL-based clock generator for an energy-aware EISC processor","publication_year":2008,"publication_date":"2008-09-01","ids":{"openalex":"https://openalex.org/W2100771209","doi":"https://doi.org/10.1109/cicc.2008.4672144","mag":"2100771209"},"language":"en","primary_location":{"id":"doi:10.1109/cicc.2008.4672144","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cicc.2008.4672144","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 IEEE Custom Integrated Circuits Conference","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5088932473","display_name":"Sunghwa Ok","orcid":null},"institutions":[{"id":"https://openalex.org/I197347611","display_name":"Korea University","ror":"https://ror.org/047dqcg40","country_code":"KR","type":"education","lineage":["https://openalex.org/I197347611"]}],"countries":["KR"],"is_corresponding":true,"raw_author_name":"Sunghwa Ok","raw_affiliation_strings":["Department of Electrical Engineering, Korea University, Seoul, South Korea","Dept. of Electr. Eng., Korea Univ., Seoul#TAB#"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Korea University, Seoul, South Korea","institution_ids":["https://openalex.org/I197347611"]},{"raw_affiliation_string":"Dept. of Electr. Eng., Korea Univ., Seoul#TAB#","institution_ids":["https://openalex.org/I197347611"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5066176714","display_name":"Jungmoon Kim","orcid":null},"institutions":[{"id":"https://openalex.org/I197347611","display_name":"Korea University","ror":"https://ror.org/047dqcg40","country_code":"KR","type":"education","lineage":["https://openalex.org/I197347611"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Jungmoon Kim","raw_affiliation_strings":["Department of Electrical Engineering, Korea University, Seoul, South Korea","Dept. of Electr. Eng., Korea Univ., Seoul#TAB#"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Korea University, Seoul, South Korea","institution_ids":["https://openalex.org/I197347611"]},{"raw_affiliation_string":"Dept. of Electr. Eng., Korea Univ., Seoul#TAB#","institution_ids":["https://openalex.org/I197347611"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5077424371","display_name":"Gilwon Yoon","orcid":null},"institutions":[{"id":"https://openalex.org/I197347611","display_name":"Korea University","ror":"https://ror.org/047dqcg40","country_code":"KR","type":"education","lineage":["https://openalex.org/I197347611"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Gilwon Yoon","raw_affiliation_strings":["Department of Electrical Engineering, Korea University, Seoul, South Korea","Dept. of Electr. Eng., Korea Univ., Seoul#TAB#"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Korea University, Seoul, South Korea","institution_ids":["https://openalex.org/I197347611"]},{"raw_affiliation_string":"Dept. of Electr. Eng., Korea Univ., Seoul#TAB#","institution_ids":["https://openalex.org/I197347611"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5042306372","display_name":"Hyunho Chu","orcid":null},"institutions":[{"id":"https://openalex.org/I197347611","display_name":"Korea University","ror":"https://ror.org/047dqcg40","country_code":"KR","type":"education","lineage":["https://openalex.org/I197347611"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Hyunho Chu","raw_affiliation_strings":["Department of Electrical Engineering, Korea University, Seoul, South Korea","Dept. of Electr. Eng., Korea Univ., Seoul#TAB#"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Korea University, Seoul, South Korea","institution_ids":["https://openalex.org/I197347611"]},{"raw_affiliation_string":"Dept. of Electr. Eng., Korea Univ., Seoul#TAB#","institution_ids":["https://openalex.org/I197347611"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103525001","display_name":"Jae\u2010Geun Oh","orcid":null},"institutions":[{"id":"https://openalex.org/I197347611","display_name":"Korea University","ror":"https://ror.org/047dqcg40","country_code":"KR","type":"education","lineage":["https://openalex.org/I197347611"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Jaegeun Oh","raw_affiliation_strings":["Department of Electrical Engineering, Korea University, Seoul, South Korea","Dept. of Electr. Eng., Korea Univ., Seoul#TAB#"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Korea University, Seoul, South Korea","institution_ids":["https://openalex.org/I197347611"]},{"raw_affiliation_string":"Dept. of Electr. Eng., Korea Univ., Seoul#TAB#","institution_ids":["https://openalex.org/I197347611"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5005365762","display_name":"Seon Wook Kim","orcid":"https://orcid.org/0000-0001-6555-1741"},"institutions":[{"id":"https://openalex.org/I197347611","display_name":"Korea University","ror":"https://ror.org/047dqcg40","country_code":"KR","type":"education","lineage":["https://openalex.org/I197347611"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Seon Wook Kim","raw_affiliation_strings":["Department of Electrical Engineering, Korea University, Seoul, South Korea","Dept. of Electr. Eng., Korea Univ., Seoul#TAB#"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Korea University, Seoul, South Korea","institution_ids":["https://openalex.org/I197347611"]},{"raw_affiliation_string":"Dept. of Electr. Eng., Korea Univ., Seoul#TAB#","institution_ids":["https://openalex.org/I197347611"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100777092","display_name":"Chulwoo Kim","orcid":null},"institutions":[{"id":"https://openalex.org/I197347611","display_name":"Korea University","ror":"https://ror.org/047dqcg40","country_code":"KR","type":"education","lineage":["https://openalex.org/I197347611"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Chulwoo Kim","raw_affiliation_strings":["Department of Electrical Engineering, Korea University, Seoul, South Korea","Dept. of Electr. Eng., Korea Univ., Seoul#TAB#"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Korea University, Seoul, South Korea","institution_ids":["https://openalex.org/I197347611"]},{"raw_affiliation_string":"Dept. of Electr. Eng., Korea Univ., Seoul#TAB#","institution_ids":["https://openalex.org/I197347611"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":7,"corresponding_author_ids":["https://openalex.org/A5088932473"],"corresponding_institution_ids":["https://openalex.org/I197347611"],"apc_list":null,"apc_paid":null,"fwci":0.6659,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":{"value":0.72990444,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"551","last_page":"554"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/clock-generator","display_name":"Clock generator","score":0.8287081718444824},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.5966739058494568},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5511536002159119},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5463082194328308},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.45706242322921753},{"id":"https://openalex.org/keywords/generator","display_name":"Generator (circuit theory)","score":0.4438191056251526},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4085242450237274},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.39152273535728455},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.35164564847946167},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3334612548351288},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.20021843910217285},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.1901683509349823},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.1149282455444336}],"concepts":[{"id":"https://openalex.org/C2778023540","wikidata":"https://www.wikidata.org/wiki/Q2164847","display_name":"Clock generator","level":4,"score":0.8287081718444824},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.5966739058494568},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5511536002159119},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5463082194328308},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.45706242322921753},{"id":"https://openalex.org/C2780992000","wikidata":"https://www.wikidata.org/wiki/Q17016113","display_name":"Generator (circuit theory)","level":3,"score":0.4438191056251526},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4085242450237274},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.39152273535728455},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.35164564847946167},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3334612548351288},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.20021843910217285},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.1901683509349823},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.1149282455444336},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/cicc.2008.4672144","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cicc.2008.4672144","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 IEEE Custom Integrated Circuits Conference","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.8999999761581421,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W2005421687","https://openalex.org/W2034484545","https://openalex.org/W2069217703","https://openalex.org/W2086447087","https://openalex.org/W2096335793","https://openalex.org/W2103029749","https://openalex.org/W2111053525","https://openalex.org/W2126777385","https://openalex.org/W2132541442","https://openalex.org/W2137300866","https://openalex.org/W2162293136","https://openalex.org/W2544113719","https://openalex.org/W2788760024","https://openalex.org/W4285719527","https://openalex.org/W6729291128"],"related_works":["https://openalex.org/W2121182846","https://openalex.org/W2315668284","https://openalex.org/W2155789024","https://openalex.org/W2109491806","https://openalex.org/W3213608175","https://openalex.org/W2369998856","https://openalex.org/W1969806930","https://openalex.org/W2002107209","https://openalex.org/W1984967896","https://openalex.org/W1967032492"],"abstract_inverted_index":{"This":[0],"paper":[1],"describes":[2],"a":[3,28,34,39,53,62],"dynamic":[4,13],"voltage":[5,64],"and":[6,38,41,71,96,105],"frequency":[7],"scaling":[8],"(DVFS)":[9],"scheme":[10],"for":[11],"the":[12,18,72,77,88,91],"power":[14],"management":[15],"(DPM)":[16],"of":[17,90],"extendable":[19],"instruction":[20],"set":[21],"computing":[22],"processor.":[23,93],"The":[24,48,57,94],"DVFS":[25],"circuit":[26,60,74],"comprises":[27],"digitally-controlled":[29],"DC-DC":[30],"buck":[31],"converter":[32],"with":[33,46],"dual":[35],"VCDL-based":[36],"ADC":[37],"low-power":[40],"low-jitter":[42],"DLL-based":[43],"clock":[44,79],"generator":[45],"self-calibration.":[47],"prototype":[49],"is":[50],"fabricated":[51],"in":[52],"0.18-mum":[54],"CMOS":[55],"process.":[56],"implemented":[58],"DVS":[59,95],"provides":[61],"supply":[63],"from":[65,80],"1.4":[66],"V":[67,70],"to":[68,83,87],"1.8":[69],"DFS":[73,97],"dynamically":[75],"generates":[76],"system":[78],"7.5":[81],"MHz":[82,85],"120":[84],"according":[86],"workload":[89],"embedded":[92],"circuits":[98],"occupy":[99],"2.72":[100],"mm":[101,107],"<sup":[102,108],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[103,109],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">2</sup>":[104,110],"0.27":[106],"active":[111],"areas,":[112],"respectively.":[113]},"counts_by_year":[{"year":2020,"cited_by_count":1},{"year":2017,"cited_by_count":2},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
