{"id":"https://openalex.org/W2124128845","doi":"https://doi.org/10.1109/cicc.2008.4672053","title":"Amorphous silicon logic circuits on flexible substrates","display_name":"Amorphous silicon logic circuits on flexible substrates","publication_year":2008,"publication_date":"2008-09-01","ids":{"openalex":"https://openalex.org/W2124128845","doi":"https://doi.org/10.1109/cicc.2008.4672053","mag":"2124128845"},"language":"en","primary_location":{"id":"doi:10.1109/cicc.2008.4672053","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cicc.2008.4672053","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 IEEE Custom Integrated Circuits Conference","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5085117599","display_name":"Rahul Shringarpure","orcid":null},"institutions":[{"id":"https://openalex.org/I55732556","display_name":"Arizona State University","ror":"https://ror.org/03efmqc40","country_code":"US","type":"education","lineage":["https://openalex.org/I55732556"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Rahul Shringarpure","raw_affiliation_strings":["Arizona State University, Tempe, United States"],"affiliations":[{"raw_affiliation_string":"Arizona State University, Tempe, United States","institution_ids":["https://openalex.org/I55732556"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5015329523","display_name":"Lawrence T. Clark","orcid":"https://orcid.org/0000-0001-7741-6512"},"institutions":[{"id":"https://openalex.org/I55732556","display_name":"Arizona State University","ror":"https://ror.org/03efmqc40","country_code":"US","type":"education","lineage":["https://openalex.org/I55732556"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Lawrence T. Clark","raw_affiliation_strings":["Arizona State University, Tempe, United States"],"affiliations":[{"raw_affiliation_string":"Arizona State University, Tempe, United States","institution_ids":["https://openalex.org/I55732556"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110013657","display_name":"Sameer M. Venugopal","orcid":null},"institutions":[{"id":"https://openalex.org/I55732556","display_name":"Arizona State University","ror":"https://ror.org/03efmqc40","country_code":"US","type":"education","lineage":["https://openalex.org/I55732556"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sameer M. Venugopal","raw_affiliation_strings":["Arizona State University, Tempe, United States"],"affiliations":[{"raw_affiliation_string":"Arizona State University, Tempe, United States","institution_ids":["https://openalex.org/I55732556"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5078103916","display_name":"David R. Allee","orcid":"https://orcid.org/0000-0002-8464-0069"},"institutions":[{"id":"https://openalex.org/I4210154524","display_name":"European Council for an Energy Efficient Economy","ror":"https://ror.org/04xytpa07","country_code":"SE","type":"nonprofit","lineage":["https://openalex.org/I4210154524"]}],"countries":["SE"],"is_corresponding":false,"raw_author_name":"David R. Allee","raw_affiliation_strings":["IAFSE-ECEE: Electrical Engineering"],"affiliations":[{"raw_affiliation_string":"IAFSE-ECEE: Electrical Engineering","institution_ids":["https://openalex.org/I4210154524"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5016537676","display_name":"Shrinivas Gopalan Uppili","orcid":null},"institutions":[{"id":"https://openalex.org/I55732556","display_name":"Arizona State University","ror":"https://ror.org/03efmqc40","country_code":"US","type":"education","lineage":["https://openalex.org/I55732556"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Shrinivas G. Uppili","raw_affiliation_strings":["Arizona State University, Tempe, United States"],"affiliations":[{"raw_affiliation_string":"Arizona State University, Tempe, United States","institution_ids":["https://openalex.org/I55732556"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5085117599"],"corresponding_institution_ids":["https://openalex.org/I55732556"],"apc_list":null,"apc_paid":null,"fwci":2.3306,"has_fulltext":false,"cited_by_count":10,"citation_normalized_percentile":{"value":0.88702819,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":"36","issue":null,"first_page":"181","last_page":"184"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10623","display_name":"Thin-Film Transistor Technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10623","display_name":"Thin-Film Transistor Technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9976999759674072,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.6809879541397095},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.6773289442062378},{"id":"https://openalex.org/keywords/logic-family","display_name":"Logic family","score":0.606319785118103},{"id":"https://openalex.org/keywords/pass-transistor-logic","display_name":"Pass transistor logic","score":0.5668551325798035},{"id":"https://openalex.org/keywords/resistor\u2013transistor-logic","display_name":"Resistor\u2013transistor logic","score":0.5518991947174072},{"id":"https://openalex.org/keywords/diode\u2013transistor-logic","display_name":"Diode\u2013transistor logic","score":0.5022263526916504},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.5017998218536377},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4676741063594818},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.46537017822265625},{"id":"https://openalex.org/keywords/silicon","display_name":"Silicon","score":0.4638611674308777},{"id":"https://openalex.org/keywords/amorphous-silicon","display_name":"Amorphous silicon","score":0.44283509254455566},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.4360868036746979},{"id":"https://openalex.org/keywords/dynamic-logic","display_name":"Dynamic logic (digital electronics)","score":0.42867618799209595},{"id":"https://openalex.org/keywords/programmable-logic-device","display_name":"Programmable logic device","score":0.4245569109916687},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.4227236211299896},{"id":"https://openalex.org/keywords/digital-electronics","display_name":"Digital electronics","score":0.34701961278915405},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2579125165939331},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.23789912462234497},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2269485592842102},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.15004169940948486},{"id":"https://openalex.org/keywords/crystalline-silicon","display_name":"Crystalline silicon","score":0.11922526359558105},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.05621501803398132}],"concepts":[{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.6809879541397095},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.6773289442062378},{"id":"https://openalex.org/C162454741","wikidata":"https://www.wikidata.org/wiki/Q173359","display_name":"Logic family","level":4,"score":0.606319785118103},{"id":"https://openalex.org/C198521697","wikidata":"https://www.wikidata.org/wiki/Q7142438","display_name":"Pass transistor logic","level":4,"score":0.5668551325798035},{"id":"https://openalex.org/C180405849","wikidata":"https://www.wikidata.org/wiki/Q173464","display_name":"Resistor\u2013transistor logic","level":5,"score":0.5518991947174072},{"id":"https://openalex.org/C118759142","wikidata":"https://www.wikidata.org/wiki/Q173475","display_name":"Diode\u2013transistor logic","level":5,"score":0.5022263526916504},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.5017998218536377},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4676741063594818},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.46537017822265625},{"id":"https://openalex.org/C544956773","wikidata":"https://www.wikidata.org/wiki/Q670","display_name":"Silicon","level":2,"score":0.4638611674308777},{"id":"https://openalex.org/C2776390347","wikidata":"https://www.wikidata.org/wiki/Q474163","display_name":"Amorphous silicon","level":4,"score":0.44283509254455566},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.4360868036746979},{"id":"https://openalex.org/C2777796570","wikidata":"https://www.wikidata.org/wiki/Q2351326","display_name":"Dynamic logic (digital electronics)","level":4,"score":0.42867618799209595},{"id":"https://openalex.org/C206274596","wikidata":"https://www.wikidata.org/wiki/Q1063837","display_name":"Programmable logic device","level":2,"score":0.4245569109916687},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.4227236211299896},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.34701961278915405},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2579125165939331},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.23789912462234497},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2269485592842102},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.15004169940948486},{"id":"https://openalex.org/C2779667780","wikidata":"https://www.wikidata.org/wiki/Q18206302","display_name":"Crystalline silicon","level":3,"score":0.11922526359558105},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.05621501803398132}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/cicc.2008.4672053","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cicc.2008.4672053","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 IEEE Custom Integrated Circuits Conference","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.44999998807907104}],"awards":[],"funders":[{"id":"https://openalex.org/F4320338295","display_name":"Army Research Laboratory","ror":"https://ror.org/011hc8f90"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W156735343","https://openalex.org/W1518236483","https://openalex.org/W1974218932","https://openalex.org/W2061935336","https://openalex.org/W2110189718","https://openalex.org/W2123101545","https://openalex.org/W2145297389","https://openalex.org/W2157066171"],"related_works":["https://openalex.org/W2021357106","https://openalex.org/W2017528947","https://openalex.org/W2526300902","https://openalex.org/W1495073259","https://openalex.org/W2155174752","https://openalex.org/W2991771859","https://openalex.org/W2158157809","https://openalex.org/W2561751396","https://openalex.org/W2142702094","https://openalex.org/W2127151832"],"abstract_inverted_index":{"This":[0],"paper":[1],"describes":[2],"the":[3,20,53],"design":[4,55],"of":[5],"amorphous":[6],"silicon":[7],"(a-Si:H)":[8],"logic":[9,16,67],"circuits":[10,51],"using":[11],"static":[12],"and":[13,45,61],"dynamic":[14,50],"programmable":[15],"arrays":[17],"(PLApsilas)":[18],"as":[19],"baseline":[21],"examples.":[22],"The":[23],"PLApsilas":[24],"are":[25,52],"designed":[26],"with":[27],"n-channel":[28],"a-Si:H":[29,65],"thin":[30],"film":[31],"transistors":[32],"(TFTpsilas)":[33],"manufactured":[34],"in":[35],"a":[36,59],"low":[37],"temperature":[38],"(180degC)":[39],"process":[40],"for":[41,64],"flexible":[42,66],"substrates.":[43],"Measured":[44],"simulated":[46],"results":[47],"demonstrate":[48],"that":[49],"best":[54],"approach,":[56],"from":[57],"both":[58],"power":[60],"delay":[62],"viewpoint,":[63],"circuits.":[68]},"counts_by_year":[{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}