{"id":"https://openalex.org/W2074534619","doi":"https://doi.org/10.1109/cicc.2007.4405718","title":"Temperature Sensor Design in a High Volume Manufacturing 65nm CMOS Digital Process","display_name":"Temperature Sensor Design in a High Volume Manufacturing 65nm CMOS Digital Process","publication_year":2007,"publication_date":"2007-01-01","ids":{"openalex":"https://openalex.org/W2074534619","doi":"https://doi.org/10.1109/cicc.2007.4405718","mag":"2074534619"},"language":"en","primary_location":{"id":"doi:10.1109/cicc.2007.4405718","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cicc.2007.4405718","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2007 IEEE Custom Integrated Circuits Conference","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101664947","display_name":"D. Duarte","orcid":"https://orcid.org/0000-0001-8846-0324"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"David E. Duarte","raw_affiliation_strings":["Logic Technology Development, Intel Corporation, Hillsboro, OR, USA","Intel Corporation,, Hillsboro,"],"affiliations":[{"raw_affiliation_string":"Logic Technology Development, Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Corporation,, Hillsboro,","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5031530468","display_name":"G. Geannopoulos","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"George Geannopoulos","raw_affiliation_strings":["Logic Technology Development, Intel Corporation, Hillsboro, OR, USA","Intel Corporation,, Hillsboro,"],"affiliations":[{"raw_affiliation_string":"Logic Technology Development, Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Corporation,, Hillsboro,","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5049879683","display_name":"U.A. Mughal","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Usman Mughal","raw_affiliation_strings":["Logic Technology Development, Intel Corporation, Hillsboro, OR, USA","Intel Corporation,, Hillsboro,"],"affiliations":[{"raw_affiliation_string":"Logic Technology Development, Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Corporation,, Hillsboro,","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109191251","display_name":"K.L. Wong","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Keng L. Wong","raw_affiliation_strings":["Logic Technology Development, Intel Corporation, Hillsboro, OR, USA","Intel Corporation,, Hillsboro,"],"affiliations":[{"raw_affiliation_string":"Logic Technology Development, Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Corporation,, Hillsboro,","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5113819120","display_name":"G. Taylor","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Greg Taylor","raw_affiliation_strings":["Logic Technology Development, Intel Corporation, Hillsboro, OR, USA","Intel Corporation,, Hillsboro,"],"affiliations":[{"raw_affiliation_string":"Logic Technology Development, Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Corporation,, Hillsboro,","institution_ids":["https://openalex.org/I1343180700"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5101664947"],"corresponding_institution_ids":["https://openalex.org/I1343180700"],"apc_list":null,"apc_paid":null,"fwci":5.6198,"has_fulltext":false,"cited_by_count":60,"citation_normalized_percentile":{"value":0.95939182,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"221","last_page":"224"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10369","display_name":"Advanced MEMS and NEMS Technologies","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/volume","display_name":"Volume (thermodynamics)","score":0.5991812348365784},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5867654085159302},{"id":"https://openalex.org/keywords/junction-temperature","display_name":"Junction temperature","score":0.5834648013114929},{"id":"https://openalex.org/keywords/thermal","display_name":"Thermal","score":0.5336020588874817},{"id":"https://openalex.org/keywords/die","display_name":"Die (integrated circuit)","score":0.5301680564880371},{"id":"https://openalex.org/keywords/linearity","display_name":"Linearity","score":0.5171241760253906},{"id":"https://openalex.org/keywords/temperature-measurement","display_name":"Temperature measurement","score":0.5135345458984375},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.4925280511379242},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.47325021028518677},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.46885761618614197},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.4370284080505371},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.43601784110069275},{"id":"https://openalex.org/keywords/core","display_name":"Core (optical fiber)","score":0.42270010709762573},{"id":"https://openalex.org/keywords/power-consumption","display_name":"Power consumption","score":0.42255163192749023},{"id":"https://openalex.org/keywords/thermal-resistance","display_name":"Thermal resistance","score":0.41431117057800293},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3729931116104126},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.3563241958618164},{"id":"https://openalex.org/keywords/mechanical-engineering","display_name":"Mechanical engineering","score":0.22934553027153015},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.13684138655662537},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.09404236078262329}],"concepts":[{"id":"https://openalex.org/C20556612","wikidata":"https://www.wikidata.org/wiki/Q4469374","display_name":"Volume (thermodynamics)","level":2,"score":0.5991812348365784},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5867654085159302},{"id":"https://openalex.org/C167781694","wikidata":"https://www.wikidata.org/wiki/Q6311800","display_name":"Junction temperature","level":3,"score":0.5834648013114929},{"id":"https://openalex.org/C204530211","wikidata":"https://www.wikidata.org/wiki/Q752823","display_name":"Thermal","level":2,"score":0.5336020588874817},{"id":"https://openalex.org/C111106434","wikidata":"https://www.wikidata.org/wiki/Q1072430","display_name":"Die (integrated circuit)","level":2,"score":0.5301680564880371},{"id":"https://openalex.org/C77170095","wikidata":"https://www.wikidata.org/wiki/Q1753188","display_name":"Linearity","level":2,"score":0.5171241760253906},{"id":"https://openalex.org/C72293138","wikidata":"https://www.wikidata.org/wiki/Q909741","display_name":"Temperature measurement","level":2,"score":0.5135345458984375},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.4925280511379242},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.47325021028518677},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.46885761618614197},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.4370284080505371},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.43601784110069275},{"id":"https://openalex.org/C2164484","wikidata":"https://www.wikidata.org/wiki/Q5170150","display_name":"Core (optical fiber)","level":2,"score":0.42270010709762573},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.42255163192749023},{"id":"https://openalex.org/C137693562","wikidata":"https://www.wikidata.org/wiki/Q899628","display_name":"Thermal resistance","level":3,"score":0.41431117057800293},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3729931116104126},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.3563241958618164},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.22934553027153015},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.13684138655662537},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.09404236078262329},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C153294291","wikidata":"https://www.wikidata.org/wiki/Q25261","display_name":"Meteorology","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/cicc.2007.4405718","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cicc.2007.4405718","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2007 IEEE Custom Integrated Circuits Conference","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.6600000262260437}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W1490268218","https://openalex.org/W2064189791","https://openalex.org/W2116295078","https://openalex.org/W2126093914","https://openalex.org/W2132729131","https://openalex.org/W2136214421","https://openalex.org/W2167541720","https://openalex.org/W2171849451","https://openalex.org/W6684657747"],"related_works":["https://openalex.org/W2160519523","https://openalex.org/W2548839566","https://openalex.org/W2241736443","https://openalex.org/W2605847106","https://openalex.org/W3009220070","https://openalex.org/W2387329802","https://openalex.org/W3215942247","https://openalex.org/W2591735537","https://openalex.org/W1988915862","https://openalex.org/W4283754245"],"abstract_inverted_index":{"Thermal":[0],"management":[1],"(TM)":[2],"allows":[3],"the":[4,26,29,33,56,63,69,74],"system":[5],"architect":[6],"to":[7],"design":[8],"a":[9,40],"cooling":[10],"solution":[11],"based":[12],"on":[13,62],"real-life":[14],"power":[15],"consumption,":[16],"not":[17],"peak":[18],"power.":[19],"The":[20],"on-die":[21,34],"thermal":[22,43],"sensor":[23,44],"circuit,":[24],"as":[25],"core":[27],"of":[28,52,73],"TM":[30],"system,":[31],"monitors":[32],"junction":[35],"temperature":[36],"(Tj).":[37],"We":[38],"present":[39],"novel":[41],"high-linearity":[42],"topology":[45],"with":[46],"built-in":[47],"circuit":[48],"support":[49],"for":[50],"correction":[51],"systematic":[53],"shifts":[54],"in":[55],"transfer":[57],"function":[58],"correction.":[59],"Results":[60],"obtained":[61],"65":[64],"nm":[65],"Pentiumreg4":[66],"processor":[67],"demonstrate":[68],"feasibility":[70],"and":[71],"effectiveness":[72],"design.":[75]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":3},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":6},{"year":2017,"cited_by_count":2},{"year":2016,"cited_by_count":3},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":6},{"year":2013,"cited_by_count":5},{"year":2012,"cited_by_count":6}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}