{"id":"https://openalex.org/W2124153581","doi":"https://doi.org/10.1109/cicc.2005.1568667","title":"Simulation and analysis of inductive impact on VLSI interconnects in the presence of process variations","display_name":"Simulation and analysis of inductive impact on VLSI interconnects in the presence of process variations","publication_year":2006,"publication_date":"2006-01-18","ids":{"openalex":"https://openalex.org/W2124153581","doi":"https://doi.org/10.1109/cicc.2005.1568667","mag":"2124153581"},"language":"en","primary_location":{"id":"doi:10.1109/cicc.2005.1568667","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cicc.2005.1568667","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005.","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5002312717","display_name":"Xiaoning Qi","orcid":"https://orcid.org/0000-0003-1748-1878"},"institutions":[{"id":"https://openalex.org/I1335490905","display_name":"Synopsys (Switzerland)","ror":"https://ror.org/03mb54f81","country_code":"CH","type":"company","lineage":["https://openalex.org/I1335490905","https://openalex.org/I4210088951"]},{"id":"https://openalex.org/I4210088951","display_name":"Synopsys (United States)","ror":"https://ror.org/013by2m91","country_code":"US","type":"company","lineage":["https://openalex.org/I4210088951"]}],"countries":["CH","US"],"is_corresponding":false,"raw_author_name":"Xiaoning Qi","raw_affiliation_strings":["Synopsys, Inc., Mountain View, CA, USA","Synopsys, Inc. Mountain View, CA USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Synopsys, Inc., Mountain View, CA, USA","institution_ids":["https://openalex.org/I4210088951"]},{"raw_affiliation_string":"Synopsys, Inc. Mountain View, CA USA","institution_ids":["https://openalex.org/I1335490905"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5066350120","display_name":"Sam Lo","orcid":"https://orcid.org/0000-0002-1440-7616"},"institutions":[{"id":"https://openalex.org/I1335490905","display_name":"Synopsys (Switzerland)","ror":"https://ror.org/03mb54f81","country_code":"CH","type":"company","lineage":["https://openalex.org/I1335490905","https://openalex.org/I4210088951"]},{"id":"https://openalex.org/I4210088951","display_name":"Synopsys (United States)","ror":"https://ror.org/013by2m91","country_code":"US","type":"company","lineage":["https://openalex.org/I4210088951"]}],"countries":["CH","US"],"is_corresponding":false,"raw_author_name":"S.C. Lo","raw_affiliation_strings":["Synopsys, Inc., Mountain View, CA, USA","Synopsys, Inc. Mountain View, CA USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Synopsys, Inc., Mountain View, CA, USA","institution_ids":["https://openalex.org/I4210088951"]},{"raw_affiliation_string":"Synopsys, Inc. Mountain View, CA USA","institution_ids":["https://openalex.org/I1335490905"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100888927","display_name":"Yan-Sheng Luo","orcid":null},"institutions":[{"id":"https://openalex.org/I1335490905","display_name":"Synopsys (Switzerland)","ror":"https://ror.org/03mb54f81","country_code":"CH","type":"company","lineage":["https://openalex.org/I1335490905","https://openalex.org/I4210088951"]},{"id":"https://openalex.org/I4210088951","display_name":"Synopsys (United States)","ror":"https://ror.org/013by2m91","country_code":"US","type":"company","lineage":["https://openalex.org/I4210088951"]}],"countries":["CH","US"],"is_corresponding":false,"raw_author_name":"Yansheng Luo","raw_affiliation_strings":["Synopsys, Inc., Mountain View, CA, USA","Synopsys, Inc. Mountain View, CA USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Synopsys, Inc., Mountain View, CA, USA","institution_ids":["https://openalex.org/I4210088951"]},{"raw_affiliation_string":"Synopsys, Inc. Mountain View, CA USA","institution_ids":["https://openalex.org/I1335490905"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5020561547","display_name":"Alex Gyure","orcid":null},"institutions":[{"id":"https://openalex.org/I1335490905","display_name":"Synopsys (Switzerland)","ror":"https://ror.org/03mb54f81","country_code":"CH","type":"company","lineage":["https://openalex.org/I1335490905","https://openalex.org/I4210088951"]},{"id":"https://openalex.org/I4210088951","display_name":"Synopsys (United States)","ror":"https://ror.org/013by2m91","country_code":"US","type":"company","lineage":["https://openalex.org/I4210088951"]}],"countries":["CH","US"],"is_corresponding":false,"raw_author_name":"A. Gyure","raw_affiliation_strings":["Synopsys, Inc., Mountain View, CA, USA","Synopsys, Inc. Mountain View, CA USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Synopsys, Inc., Mountain View, CA, USA","institution_ids":["https://openalex.org/I4210088951"]},{"raw_affiliation_string":"Synopsys, Inc. Mountain View, CA USA","institution_ids":["https://openalex.org/I1335490905"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5064349870","display_name":"M. Shahram","orcid":null},"institutions":[{"id":"https://openalex.org/I1335490905","display_name":"Synopsys (Switzerland)","ror":"https://ror.org/03mb54f81","country_code":"CH","type":"company","lineage":["https://openalex.org/I1335490905","https://openalex.org/I4210088951"]},{"id":"https://openalex.org/I4210088951","display_name":"Synopsys (United States)","ror":"https://ror.org/013by2m91","country_code":"US","type":"company","lineage":["https://openalex.org/I4210088951"]}],"countries":["CH","US"],"is_corresponding":false,"raw_author_name":"M. Shahram","raw_affiliation_strings":["Synopsys, Inc., Mountain View, CA, USA","Synopsys, Inc. Mountain View, CA USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Synopsys, Inc., Mountain View, CA, USA","institution_ids":["https://openalex.org/I4210088951"]},{"raw_affiliation_string":"Synopsys, Inc. Mountain View, CA USA","institution_ids":["https://openalex.org/I1335490905"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5110384490","display_name":"K. Singhal","orcid":null},"institutions":[{"id":"https://openalex.org/I1335490905","display_name":"Synopsys (Switzerland)","ror":"https://ror.org/03mb54f81","country_code":"CH","type":"company","lineage":["https://openalex.org/I1335490905","https://openalex.org/I4210088951"]},{"id":"https://openalex.org/I4210088951","display_name":"Synopsys (United States)","ror":"https://ror.org/013by2m91","country_code":"US","type":"company","lineage":["https://openalex.org/I4210088951"]}],"countries":["CH","US"],"is_corresponding":false,"raw_author_name":"K. Singhal","raw_affiliation_strings":["Synopsys, Inc., Mountain View, CA, USA","Synopsys, Inc. Mountain View, CA USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Synopsys, Inc., Mountain View, CA, USA","institution_ids":["https://openalex.org/I4210088951"]},{"raw_affiliation_string":"Synopsys, Inc. Mountain View, CA USA","institution_ids":["https://openalex.org/I1335490905"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":6,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.5337,"has_fulltext":false,"cited_by_count":8,"citation_normalized_percentile":{"value":0.839407,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"302","last_page":"305"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11444","display_name":"Electromagnetic Compatibility and Noise Suppression","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12495","display_name":"Electrostatic Discharge in Electronics","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/rlc-circuit","display_name":"RLC circuit","score":0.8073951005935669},{"id":"https://openalex.org/keywords/inductance","display_name":"Inductance","score":0.7594482898712158},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.6276432275772095},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.5958240032196045},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5635013580322266},{"id":"https://openalex.org/keywords/noise","display_name":"Noise (video)","score":0.5494505763053894},{"id":"https://openalex.org/keywords/signal-integrity","display_name":"Signal integrity","score":0.5383526086807251},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.5299580693244934},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.4983353614807129},{"id":"https://openalex.org/keywords/signal","display_name":"SIGNAL (programming language)","score":0.4538189470767975},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.4349250793457031},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.41031157970428467},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.31093400716781616},{"id":"https://openalex.org/keywords/capacitor","display_name":"Capacitor","score":0.21930387616157532},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.14595726132392883},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.12536540627479553}],"concepts":[{"id":"https://openalex.org/C89880566","wikidata":"https://www.wikidata.org/wiki/Q323477","display_name":"RLC circuit","level":4,"score":0.8073951005935669},{"id":"https://openalex.org/C29210110","wikidata":"https://www.wikidata.org/wiki/Q177897","display_name":"Inductance","level":3,"score":0.7594482898712158},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.6276432275772095},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.5958240032196045},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5635013580322266},{"id":"https://openalex.org/C99498987","wikidata":"https://www.wikidata.org/wiki/Q2210247","display_name":"Noise (video)","level":3,"score":0.5494505763053894},{"id":"https://openalex.org/C44938667","wikidata":"https://www.wikidata.org/wiki/Q4503810","display_name":"Signal integrity","level":3,"score":0.5383526086807251},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.5299580693244934},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.4983353614807129},{"id":"https://openalex.org/C2779843651","wikidata":"https://www.wikidata.org/wiki/Q7390335","display_name":"SIGNAL (programming language)","level":2,"score":0.4538189470767975},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.4349250793457031},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.41031157970428467},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.31093400716781616},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.21930387616157532},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.14595726132392883},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.12536540627479553},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/cicc.2005.1568667","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cicc.2005.1568667","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005.","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W1501475031","https://openalex.org/W1508076293","https://openalex.org/W1517661712","https://openalex.org/W1583219010","https://openalex.org/W1953689745","https://openalex.org/W2118567051","https://openalex.org/W2137055620","https://openalex.org/W2160740950","https://openalex.org/W4249746713","https://openalex.org/W6634865346"],"related_works":["https://openalex.org/W2289987414","https://openalex.org/W2386114299","https://openalex.org/W2081032080","https://openalex.org/W2105517597","https://openalex.org/W2134733504","https://openalex.org/W1549949180","https://openalex.org/W2101451133","https://openalex.org/W2144460576","https://openalex.org/W1520075683","https://openalex.org/W4252609075"],"abstract_inverted_index":{"On-chip":[0],"inductance":[1,30],"impact":[2,28,47,76],"on":[3,48,77],"signal":[4,79],"integrity,":[5],"complicated":[6],"by":[7],"process":[8,35],"variations,":[9],"becomes":[10],"challenging":[11],"for":[12,26],"global":[13],"interconnects":[14],"in":[15,31,40],"nanometer":[16],"designs.":[17],"Simulation":[18],"and":[19,56,64],"analysis":[20],"of":[21,29,34],"on-chip":[22],"buses":[23],"are":[24],"presented":[25],"the":[27,32],"presence":[33],"variations.":[36],"Results":[37],"show":[38],"that":[39],"90nm":[41],"technology":[42],"there":[43],"is":[44,81],"significant":[45],"inductive":[46],"max-timing":[49,72],"(/spl":[50,58],"sim/9%":[51],"push-out":[52],"vs.":[53],"RC":[54,61],"delay)":[55],"noise":[57,80],"sim/2/spl":[59],"times/":[60],"noise).":[62],"Device":[63],"interconnect":[65],"variations":[66],"add":[67],"/spl":[68],"sim/4%":[69],"into":[70],"RLC":[71,78],"impact,":[73],"while":[74],"their":[75],"nonappreciable.":[82]},"counts_by_year":[{"year":2016,"cited_by_count":1},{"year":2014,"cited_by_count":2}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
