{"id":"https://openalex.org/W2562383580","doi":"https://doi.org/10.1109/cicc.2004.1358783","title":"Low power logic circuit and SRAM cell applications with silicon on depletion layer CMOS (SODEL CMOS) technology","display_name":"Low power logic circuit and SRAM cell applications with silicon on depletion layer CMOS (SODEL CMOS) technology","publication_year":2004,"publication_date":"2004-11-30","ids":{"openalex":"https://openalex.org/W2562383580","doi":"https://doi.org/10.1109/cicc.2004.1358783","mag":"2562383580"},"language":"en","primary_location":{"id":"doi:10.1109/cicc.2004.1358783","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cicc.2004.1358783","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5053715314","display_name":"S. Inaba","orcid":"https://orcid.org/0000-0003-4936-0288"},"institutions":[{"id":"https://openalex.org/I1292669757","display_name":"Toshiba (Japan)","ror":"https://ror.org/0326v3z14","country_code":"JP","type":"company","lineage":["https://openalex.org/I1292669757"]}],"countries":["JP"],"is_corresponding":true,"raw_author_name":"S. Inaba","raw_affiliation_strings":["SoC Research & Development Center, Toshiba Corporation Semiconductor Company, Yokohama, JAPAN"],"affiliations":[{"raw_affiliation_string":"SoC Research & Development Center, Toshiba Corporation Semiconductor Company, Yokohama, JAPAN","institution_ids":["https://openalex.org/I1292669757"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5113131674","display_name":"H. Nagano","orcid":null},"institutions":[{"id":"https://openalex.org/I1292669757","display_name":"Toshiba (Japan)","ror":"https://ror.org/0326v3z14","country_code":"JP","type":"company","lineage":["https://openalex.org/I1292669757"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"H. Nagano","raw_affiliation_strings":["Process & Manufacturing Engineering Center, Toshiba Corporation Semiconductor Company, Yokohama, JAPAN"],"affiliations":[{"raw_affiliation_string":"Process & Manufacturing Engineering Center, Toshiba Corporation Semiconductor Company, Yokohama, JAPAN","institution_ids":["https://openalex.org/I1292669757"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110522194","display_name":"K. Miyano","orcid":null},"institutions":[{"id":"https://openalex.org/I1292669757","display_name":"Toshiba (Japan)","ror":"https://ror.org/0326v3z14","country_code":"JP","type":"company","lineage":["https://openalex.org/I1292669757"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"K. Miyano","raw_affiliation_strings":["Process & Manufacturing Engineering Center, Toshiba Corporation Semiconductor Company, Yokohama, JAPAN"],"affiliations":[{"raw_affiliation_string":"Process & Manufacturing Engineering Center, Toshiba Corporation Semiconductor Company, Yokohama, JAPAN","institution_ids":["https://openalex.org/I1292669757"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5053073603","display_name":"Ichiro Mizushima","orcid":"https://orcid.org/0000-0002-6534-6032"},"institutions":[{"id":"https://openalex.org/I1292669757","display_name":"Toshiba (Japan)","ror":"https://ror.org/0326v3z14","country_code":"JP","type":"company","lineage":["https://openalex.org/I1292669757"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"I. Mizushima","raw_affiliation_strings":["Process & Manufacturing Engineering Center, Toshiba Corporation Semiconductor Company, Yokohama, JAPAN"],"affiliations":[{"raw_affiliation_string":"Process & Manufacturing Engineering Center, Toshiba Corporation Semiconductor Company, Yokohama, JAPAN","institution_ids":["https://openalex.org/I1292669757"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5037891240","display_name":"Y. Okayama","orcid":null},"institutions":[{"id":"https://openalex.org/I1292669757","display_name":"Toshiba (Japan)","ror":"https://ror.org/0326v3z14","country_code":"JP","type":"company","lineage":["https://openalex.org/I1292669757"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Y. Okayama","raw_affiliation_strings":["SoC Research & Development Center, Toshiba Corporation Semiconductor Company, Yokohama, JAPAN"],"affiliations":[{"raw_affiliation_string":"SoC Research & Development Center, Toshiba Corporation Semiconductor Company, Yokohama, JAPAN","institution_ids":["https://openalex.org/I1292669757"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5035011395","display_name":"Takuya Nakauchi","orcid":null},"institutions":[{"id":"https://openalex.org/I1292669757","display_name":"Toshiba (Japan)","ror":"https://ror.org/0326v3z14","country_code":"JP","type":"company","lineage":["https://openalex.org/I1292669757"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"T. Nakauchi","raw_affiliation_strings":["Mobile Memory Device Engineering Division, Toshiba Corporation Semiconductor Company, Yokohama, JAPAN"],"affiliations":[{"raw_affiliation_string":"Mobile Memory Device Engineering Division, Toshiba Corporation Semiconductor Company, Yokohama, JAPAN","institution_ids":["https://openalex.org/I1292669757"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5002087176","display_name":"K. Ishimaru","orcid":"https://orcid.org/0000-0003-3170-9410"},"institutions":[{"id":"https://openalex.org/I1292669757","display_name":"Toshiba (Japan)","ror":"https://ror.org/0326v3z14","country_code":"JP","type":"company","lineage":["https://openalex.org/I1292669757"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"K. Ishimaru","raw_affiliation_strings":["SoC Research & Development Center, Toshiba Corporation Semiconductor Company, Yokohama, JAPAN"],"affiliations":[{"raw_affiliation_string":"SoC Research & Development Center, Toshiba Corporation Semiconductor Company, Yokohama, JAPAN","institution_ids":["https://openalex.org/I1292669757"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5009522049","display_name":"H. Ishiuchi","orcid":null},"institutions":[{"id":"https://openalex.org/I1292669757","display_name":"Toshiba (Japan)","ror":"https://ror.org/0326v3z14","country_code":"JP","type":"company","lineage":["https://openalex.org/I1292669757"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"H. Ishiuchi","raw_affiliation_strings":["SoC Research & Development Center, Toshiba Corporation Semiconductor Company, Yokohama, JAPAN"],"affiliations":[{"raw_affiliation_string":"SoC Research & Development Center, Toshiba Corporation Semiconductor Company, Yokohama, JAPAN","institution_ids":["https://openalex.org/I1292669757"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":8,"corresponding_author_ids":["https://openalex.org/A5053715314"],"corresponding_institution_ids":["https://openalex.org/I1292669757"],"apc_list":null,"apc_paid":null,"fwci":0.3292,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.67545163,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"225","last_page":"228"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.9522528052330017},{"id":"https://openalex.org/keywords/spice","display_name":"Spice","score":0.7386690378189087},{"id":"https://openalex.org/keywords/power\u2013delay-product","display_name":"Power\u2013delay product","score":0.6504969596862793},{"id":"https://openalex.org/keywords/propagation-delay","display_name":"Propagation delay","score":0.5610362887382507},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.5084995031356812},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.4962955117225647},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4656325876712799},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.43896839022636414},{"id":"https://openalex.org/keywords/integrated-injection-logic","display_name":"Integrated injection logic","score":0.419497013092041},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.3538860082626343},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.33162981271743774},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.28595638275146484},{"id":"https://openalex.org/keywords/pass-transistor-logic","display_name":"Pass transistor logic","score":0.24272817373275757},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.13885506987571716},{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.06815007328987122}],"concepts":[{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.9522528052330017},{"id":"https://openalex.org/C2780077345","wikidata":"https://www.wikidata.org/wiki/Q16891888","display_name":"Spice","level":2,"score":0.7386690378189087},{"id":"https://openalex.org/C2776391166","wikidata":"https://www.wikidata.org/wiki/Q7236873","display_name":"Power\u2013delay product","level":4,"score":0.6504969596862793},{"id":"https://openalex.org/C90806461","wikidata":"https://www.wikidata.org/wiki/Q1144416","display_name":"Propagation delay","level":2,"score":0.5610362887382507},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.5084995031356812},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.4962955117225647},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4656325876712799},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.43896839022636414},{"id":"https://openalex.org/C159903706","wikidata":"https://www.wikidata.org/wiki/Q173574","display_name":"Integrated injection logic","level":5,"score":0.419497013092041},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.3538860082626343},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.33162981271743774},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.28595638275146484},{"id":"https://openalex.org/C198521697","wikidata":"https://www.wikidata.org/wiki/Q7142438","display_name":"Pass transistor logic","level":4,"score":0.24272817373275757},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.13885506987571716},{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.06815007328987122}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/cicc.2004.1358783","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cicc.2004.1358783","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.6499999761581421,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W1565517300","https://openalex.org/W1661368752","https://openalex.org/W1701055059","https://openalex.org/W2123369648","https://openalex.org/W2152121447","https://openalex.org/W2153693512","https://openalex.org/W4210341450","https://openalex.org/W6633675174","https://openalex.org/W6636884962"],"related_works":["https://openalex.org/W4225162125","https://openalex.org/W2281408260","https://openalex.org/W3211084114","https://openalex.org/W3087410190","https://openalex.org/W2035475131","https://openalex.org/W4385065677","https://openalex.org/W4388039467","https://openalex.org/W2747114707","https://openalex.org/W2981674658","https://openalex.org/W2170264339"],"abstract_inverted_index":{"In":[0,57],"this":[1],"paper,":[2],"the":[3],"AC":[4],"performance":[5],"of":[6,61,67],"SODEL":[7,23,62,101],"CMOS":[8,15,24,102],"is":[9,81],"discussed,":[10],"aiming":[11],"for":[12,88,109],"low":[13,110],"power":[14,111],"applications.":[16],"Propagation":[17],"delay":[18,80],"time":[19],"(/spl":[20],"tau/pd)":[21],"in":[22,33],"has":[25,44],"been":[26,45],"improved":[27],"by":[28,83],"up":[29],"to":[30,52,93,96],"25":[31],"%":[32],"five":[34],"stacked":[35],"nFET":[36],"inverters,":[37],"and":[38],"about":[39],"30%":[40],"better":[41,107],"power-delay":[42],"product":[43],"observed":[46,72],"at":[47,73],"same":[48],"/spl":[49,68,89],"tau/pd,":[50],"compared":[51],"conventional":[53],"(conv.)":[54],"bulk":[55,98],"CMOS.":[56,99],"SRAM":[58],"cell":[59],"applications":[60],"CMOS,":[63],"a":[64],"high":[65],"SNM":[66],"sim/95":[69],"mV":[70],"was":[71,91],"Vdd":[74],"=":[75],"0.6":[76],"V.":[77],"Smaller":[78],"bitline":[79],"confirmed":[82],"SPICE":[84],"simulations.":[85],"Latch-up":[86],"immunity":[87],"alpha/-particles":[90],"found":[92],"be":[94],"comparable":[95],"conv.":[97],"Therefore,":[100],"technology":[103],"will":[104],"give":[105],"us":[106],"solutions":[108],"SoCs.":[112]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}