{"id":"https://openalex.org/W1578992281","doi":"https://doi.org/10.1109/cicc.2003.1249441","title":"An UMTS \u03a3\u0394 fractional synthesizer with 200 kHz bandwidth and -128 dBc/Hz @ 1 MHz using spurs compensation and linearization techniques","display_name":"An UMTS \u03a3\u0394 fractional synthesizer with 200 kHz bandwidth and -128 dBc/Hz @ 1 MHz using spurs compensation and linearization techniques","publication_year":2004,"publication_date":"2004-02-03","ids":{"openalex":"https://openalex.org/W1578992281","doi":"https://doi.org/10.1109/cicc.2003.1249441","mag":"1578992281"},"language":"en","primary_location":{"id":"doi:10.1109/cicc.2003.1249441","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cicc.2003.1249441","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the IEEE 2003 Custom Integrated Circuits Conference, 2003.","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5042348389","display_name":"I. Bietti","orcid":null},"institutions":[{"id":"https://openalex.org/I25217355","display_name":"University of Pavia","ror":"https://ror.org/00s6t1f81","country_code":"IT","type":"education","lineage":["https://openalex.org/I25217355"]},{"id":"https://openalex.org/I4210154781","display_name":"STMicroelectronics (Italy)","ror":"https://ror.org/053bqv655","country_code":"IT","type":"company","lineage":["https://openalex.org/I131827901","https://openalex.org/I4210154781"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"I. Bietti","raw_affiliation_strings":["STMicroelectronics, Pavia, Italy","Universita degli Studi di Pavia, Pavia, Lombardia, IT"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"STMicroelectronics, Pavia, Italy","institution_ids":["https://openalex.org/I4210154781"]},{"raw_affiliation_string":"Universita degli Studi di Pavia, Pavia, Lombardia, IT","institution_ids":["https://openalex.org/I25217355"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5067237448","display_name":"E. Ternporitil","orcid":null},"institutions":[{"id":"https://openalex.org/I4210154781","display_name":"STMicroelectronics (Italy)","ror":"https://ror.org/053bqv655","country_code":"IT","type":"company","lineage":["https://openalex.org/I131827901","https://openalex.org/I4210154781"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"E. Ternporitil","raw_affiliation_strings":["STMicroelectronics, Pavia, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"STMicroelectronics, Pavia, Italy","institution_ids":["https://openalex.org/I4210154781"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5064585989","display_name":"Guido Albasini","orcid":"https://orcid.org/0000-0003-0457-5808"},"institutions":[{"id":"https://openalex.org/I4210154781","display_name":"STMicroelectronics (Italy)","ror":"https://ror.org/053bqv655","country_code":"IT","type":"company","lineage":["https://openalex.org/I131827901","https://openalex.org/I4210154781"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"G. Albasini","raw_affiliation_strings":["STMicroelectronics, Pavia, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"STMicroelectronics, Pavia, Italy","institution_ids":["https://openalex.org/I4210154781"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100760496","display_name":"R. Castello","orcid":"https://orcid.org/0000-0002-8375-3862"},"institutions":[{"id":"https://openalex.org/I25217355","display_name":"University of Pavia","ror":"https://ror.org/00s6t1f81","country_code":"IT","type":"education","lineage":["https://openalex.org/I25217355"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"R. Castello","raw_affiliation_strings":["Department of Electronics, University of Pavia, Pavia, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics, University of Pavia, Pavia, Italy","institution_ids":["https://openalex.org/I25217355"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.6953,"has_fulltext":false,"cited_by_count":8,"citation_normalized_percentile":{"value":0.83128535,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"463","last_page":"466"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/dbc","display_name":"dBc","score":0.8032774925231934},{"id":"https://openalex.org/keywords/umts-frequency-bands","display_name":"UMTS frequency bands","score":0.6670606136322021},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.611521303653717},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5550188422203064},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5158835649490356},{"id":"https://openalex.org/keywords/delta-sigma-modulation","display_name":"Delta-sigma modulation","score":0.48308685421943665},{"id":"https://openalex.org/keywords/frequency-synthesizer","display_name":"Frequency synthesizer","score":0.4797150492668152},{"id":"https://openalex.org/keywords/wideband","display_name":"Wideband","score":0.42750734090805054},{"id":"https://openalex.org/keywords/offset","display_name":"Offset (computer science)","score":0.42715635895729065},{"id":"https://openalex.org/keywords/phase-noise","display_name":"Phase noise","score":0.3947465419769287},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3907809555530548},{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.358303964138031},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.3402387499809265},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3173231780529022},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.2786741256713867},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.14386621117591858}],"concepts":[{"id":"https://openalex.org/C193523891","wikidata":"https://www.wikidata.org/wiki/Q1771950","display_name":"dBc","level":3,"score":0.8032774925231934},{"id":"https://openalex.org/C101618186","wikidata":"https://www.wikidata.org/wiki/Q3633928","display_name":"UMTS frequency bands","level":2,"score":0.6670606136322021},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.611521303653717},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5550188422203064},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5158835649490356},{"id":"https://openalex.org/C68754193","wikidata":"https://www.wikidata.org/wiki/Q1184820","display_name":"Delta-sigma modulation","level":3,"score":0.48308685421943665},{"id":"https://openalex.org/C182099602","wikidata":"https://www.wikidata.org/wiki/Q2660678","display_name":"Frequency synthesizer","level":4,"score":0.4797150492668152},{"id":"https://openalex.org/C2780202535","wikidata":"https://www.wikidata.org/wiki/Q4524457","display_name":"Wideband","level":2,"score":0.42750734090805054},{"id":"https://openalex.org/C175291020","wikidata":"https://www.wikidata.org/wiki/Q1156822","display_name":"Offset (computer science)","level":2,"score":0.42715635895729065},{"id":"https://openalex.org/C89631360","wikidata":"https://www.wikidata.org/wiki/Q1428766","display_name":"Phase noise","level":2,"score":0.3947465419769287},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3907809555530548},{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.358303964138031},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.3402387499809265},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3173231780529022},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.2786741256713867},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.14386621117591858},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/cicc.2003.1249441","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cicc.2003.1249441","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the IEEE 2003 Custom Integrated Circuits Conference, 2003.","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.8100000023841858,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W118952169","https://openalex.org/W1500373038","https://openalex.org/W2033908335","https://openalex.org/W2110144707","https://openalex.org/W2131877799","https://openalex.org/W2140532588","https://openalex.org/W2155933542","https://openalex.org/W2171035445","https://openalex.org/W2340429540","https://openalex.org/W6659172058","https://openalex.org/W6704214279"],"related_works":["https://openalex.org/W2330020385","https://openalex.org/W2359366503","https://openalex.org/W2350996794","https://openalex.org/W2372909716","https://openalex.org/W2080515223","https://openalex.org/W2371350995","https://openalex.org/W2049525097","https://openalex.org/W2161157531","https://openalex.org/W2350523680","https://openalex.org/W2376731877"],"abstract_inverted_index":{"This":[0,17,82,101],"paper":[1],"describes":[2],"a":[3,40,50,92,111],"general":[4],"study":[5],"on":[6],"spurs":[7],"generation":[8],"in":[9,30,91],"fractional":[10],"synthesis":[11],"and":[12,98],"techniques":[13,89],"for":[14],"their":[15],"reduction.":[16],"theory":[18],"has":[19,84],"been":[20,85],"verified":[21],"with":[22,39,66,95,110],"the":[23],"realization":[24],"of":[25,43],"two":[26],"IC":[27],"prototypes":[28],"fabricated":[29],"0.18":[31],"/spl":[32,59],"mu/m":[33],"CMOS,":[34],"targeting":[35],"UMTS-WCDMA":[36],"specifications,":[37],"both":[38],"frequency":[41],"resolution":[42],"35":[44],"Hz.":[45],"The":[46],"first":[47],"one":[48],"is":[49,77],"fully":[51],"integrated":[52],"(1.9/spl":[53],"times/1.6":[54],"mm/sup":[55],"2/)":[56],"2.1":[57],"GHz":[58],"Sigma//spl":[60],"Delta/":[61],"synthesizer":[62,102],"burning":[63],"19":[64],"mW,":[65],"600":[67],"kHz":[68,113],"3":[69,114],"dB":[70,115],"closed":[71,116],"loop":[72,99,117],"bandwidth.":[73,118],"Its":[74],"spur":[75],"performance":[76],"limited":[78],"by":[79,87],"non-linear":[80],"effects.":[81],"limitation":[83],"overcome":[86],"linearization":[88],"implemented":[90],"second":[93],"chip":[94],"external":[96],"VCO":[97],"filter.":[100],"achieves":[103],"-128":[104],"dBc/Hz":[105],"@":[106],"1":[107],"MHz":[108],"offset":[109],"200":[112]},"counts_by_year":[{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
