{"id":"https://openalex.org/W2115974408","doi":"https://doi.org/10.1109/cicc.2002.1012773","title":"High voltage tolerant ESD design for analog applications in deep submicron CMOS technologies","display_name":"High voltage tolerant ESD design for analog applications in deep submicron CMOS technologies","publication_year":2003,"publication_date":"2003-06-25","ids":{"openalex":"https://openalex.org/W2115974408","doi":"https://doi.org/10.1109/cicc.2002.1012773","mag":"2115974408"},"language":"en","primary_location":{"id":"doi:10.1109/cicc.2002.1012773","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cicc.2002.1012773","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5039224318","display_name":"Chung-Hui Chen","orcid":null},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"Chung-Hui Chen","raw_affiliation_strings":["VLSI Laboratory, National Cheng Kung University, Tainan, Taiwan, R.O.C"],"affiliations":[{"raw_affiliation_string":"VLSI Laboratory, National Cheng Kung University, Tainan, Taiwan, R.O.C","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103421953","display_name":"Yean-Kuen Fang","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Yean-Kuen Fang","raw_affiliation_strings":["VLSI Laboratory, National Cheng Kung University, Tainan, Taiwan, R.O.C"],"affiliations":[{"raw_affiliation_string":"VLSI Laboratory, National Cheng Kung University, Tainan, Taiwan, R.O.C","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101087584","display_name":"Chien-Chun Tsai","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Chien-Chun Tsai","raw_affiliation_strings":["Department of Logic Library Development, Taiwan Semiconductor Manufacturing Co., Ltd., Taiwan, R.O.C"],"affiliations":[{"raw_affiliation_string":"Department of Logic Library Development, Taiwan Semiconductor Manufacturing Co., Ltd., Taiwan, R.O.C","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5066855901","display_name":"Shen Tu","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Shen Tu","raw_affiliation_strings":["Department of Logic Library Development, Taiwan Semiconductor Manufacturing Co., Ltd., Taiwan, R.O.C"],"affiliations":[{"raw_affiliation_string":"Department of Logic Library Development, Taiwan Semiconductor Manufacturing Co., Ltd., Taiwan, R.O.C","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5078464725","display_name":"K.L. Mark","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"K.L. Mark","raw_affiliation_strings":[],"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5027826795","display_name":"K.L. Chen","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"K.L. Chen","raw_affiliation_strings":["Department of Logic Library Development, Taiwan Semiconductor Manufacturing Co., Ltd., Taiwan, R.O.C"],"affiliations":[{"raw_affiliation_string":"Department of Logic Library Development, Taiwan Semiconductor Manufacturing Co., Ltd., Taiwan, R.O.C","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5079257396","display_name":"Mi-Chang Chang","orcid":null},"institutions":[{"id":"https://openalex.org/I4210120917","display_name":"Taiwan Semiconductor Manufacturing Company (Taiwan)","ror":"https://ror.org/02wx79d08","country_code":"TW","type":"company","lineage":["https://openalex.org/I4210120917"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Mi-Chang Chang","raw_affiliation_strings":["Department of Logic Library Development, Design Service Division, Taiwan Semiconductor Manufacturing Company Limited, Taiwan"],"affiliations":[{"raw_affiliation_string":"Department of Logic Library Development, Design Service Division, Taiwan Semiconductor Manufacturing Company Limited, Taiwan","institution_ids":["https://openalex.org/I4210120917"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":7,"corresponding_author_ids":["https://openalex.org/A5039224318"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.6954,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.72917106,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"89","last_page":"92"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12495","display_name":"Electrostatic Discharge in Electronics","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12495","display_name":"Electrostatic Discharge in Electronics","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11444","display_name":"Electromagnetic Compatibility and Noise Suppression","score":0.9976999759674072,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9951000213623047,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/electrostatic-discharge","display_name":"Electrostatic discharge","score":0.8761293888092041},{"id":"https://openalex.org/keywords/nmos-logic","display_name":"NMOS logic","score":0.8218522667884827},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.8118661642074585},{"id":"https://openalex.org/keywords/capacitance","display_name":"Capacitance","score":0.7064558863639832},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.5651302337646484},{"id":"https://openalex.org/keywords/parasitic-capacitance","display_name":"Parasitic capacitance","score":0.5575352311134338},{"id":"https://openalex.org/keywords/diode","display_name":"Diode","score":0.49717023968696594},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.49016889929771423},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.4599337875843048},{"id":"https://openalex.org/keywords/high-voltage","display_name":"High voltage","score":0.434036523103714},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.42669880390167236},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.41913890838623047},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3428332209587097},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.19482877850532532},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.12506252527236938},{"id":"https://openalex.org/keywords/electrode","display_name":"Electrode","score":0.06546097993850708}],"concepts":[{"id":"https://openalex.org/C205483674","wikidata":"https://www.wikidata.org/wiki/Q3574961","display_name":"Electrostatic discharge","level":3,"score":0.8761293888092041},{"id":"https://openalex.org/C197162436","wikidata":"https://www.wikidata.org/wiki/Q83908","display_name":"NMOS logic","level":4,"score":0.8218522667884827},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.8118661642074585},{"id":"https://openalex.org/C30066665","wikidata":"https://www.wikidata.org/wiki/Q164399","display_name":"Capacitance","level":3,"score":0.7064558863639832},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.5651302337646484},{"id":"https://openalex.org/C154318817","wikidata":"https://www.wikidata.org/wiki/Q2157249","display_name":"Parasitic capacitance","level":4,"score":0.5575352311134338},{"id":"https://openalex.org/C78434282","wikidata":"https://www.wikidata.org/wiki/Q11656","display_name":"Diode","level":2,"score":0.49717023968696594},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.49016889929771423},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.4599337875843048},{"id":"https://openalex.org/C88182573","wikidata":"https://www.wikidata.org/wiki/Q1139740","display_name":"High voltage","level":3,"score":0.434036523103714},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.42669880390167236},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.41913890838623047},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3428332209587097},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.19482877850532532},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.12506252527236938},{"id":"https://openalex.org/C17525397","wikidata":"https://www.wikidata.org/wiki/Q176140","display_name":"Electrode","level":2,"score":0.06546097993850708},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/cicc.2002.1012773","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cicc.2002.1012773","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.800000011920929,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W1536939955","https://openalex.org/W1562654760","https://openalex.org/W1577786411","https://openalex.org/W2092748297","https://openalex.org/W2106958726","https://openalex.org/W2156071354","https://openalex.org/W2246932431","https://openalex.org/W3025976704","https://openalex.org/W3146867811","https://openalex.org/W3148585962"],"related_works":["https://openalex.org/W2992364380","https://openalex.org/W3038876531","https://openalex.org/W2401021868","https://openalex.org/W2150404448","https://openalex.org/W2058545256","https://openalex.org/W4396689093","https://openalex.org/W2394034449","https://openalex.org/W2904654231","https://openalex.org/W4210807885","https://openalex.org/W2051045034"],"abstract_inverted_index":{"A":[0],"new":[1],"high":[2,28],"voltage":[3],"tolerant":[4],"(HVT)":[5],"ESD":[6,29,46],"design":[7],"adopts":[8],"one":[9,17],"forward":[10],"biased":[11],"P+/N-well":[12],"diode":[13],"in":[14],"series":[15],"of":[16,48],"stacked":[18],"NMOS":[19],"to":[20],"reduce":[21],"the":[22,27,49,60],"total":[23],"capacitance":[24,63],"and":[25,33,44,55],"maintain":[26],"performance":[30],"is":[31,64],"proposed":[32],"implemented":[34],"by":[35],"0.18":[36],"/spl":[37],"mu/m":[38],"CMOS":[39],"technologies.":[40],"The":[41],"measured":[42,61],"HBM":[43],"MM":[45],"levels":[47],"HVT":[50],"pin":[51],"exceed":[52],"6":[53],"kV":[54],"550":[56],"V,":[57],"respectively,":[58],"while":[59],"input":[62],"only":[65],"250":[66],"fF.":[67]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}