{"id":"https://openalex.org/W2140609219","doi":"https://doi.org/10.1109/cicc.2002.1012770","title":"A deep sub-micron timing measurement circuit using a single-stage Vernier delay line","display_name":"A deep sub-micron timing measurement circuit using a single-stage Vernier delay line","publication_year":2003,"publication_date":"2003-06-25","ids":{"openalex":"https://openalex.org/W2140609219","doi":"https://doi.org/10.1109/cicc.2002.1012770","mag":"2140609219"},"language":"en","primary_location":{"id":"doi:10.1109/cicc.2002.1012770","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cicc.2002.1012770","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5081071302","display_name":"A.H. Chan","orcid":null},"institutions":[{"id":"https://openalex.org/I5023651","display_name":"McGill University","ror":"https://ror.org/01pxwe438","country_code":"CA","type":"education","lineage":["https://openalex.org/I5023651"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"A.H. Chan","raw_affiliation_strings":["Microelectronics and Computer Systems Laboratory, McGill University, Montreal, QUE, Canada","[Microelectron. & Comput. Syst. Lab., McGill Univ., Montreal, Que., Canada]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Microelectronics and Computer Systems Laboratory, McGill University, Montreal, QUE, Canada","institution_ids":["https://openalex.org/I5023651"]},{"raw_affiliation_string":"[Microelectron. & Comput. Syst. Lab., McGill Univ., Montreal, Que., Canada]","institution_ids":["https://openalex.org/I5023651"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5083312864","display_name":"Gordon W. Roberts","orcid":"https://orcid.org/0000-0002-4880-0272"},"institutions":[{"id":"https://openalex.org/I5023651","display_name":"McGill University","ror":"https://ror.org/01pxwe438","country_code":"CA","type":"education","lineage":["https://openalex.org/I5023651"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"G.W. Roberts","raw_affiliation_strings":["Microelectronics and Computer Systems Laboratory, McGill University, Montreal, QUE, Canada","[Microelectron. & Comput. Syst. Lab., McGill Univ., Montreal, Que., Canada]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Microelectronics and Computer Systems Laboratory, McGill University, Montreal, QUE, Canada","institution_ids":["https://openalex.org/I5023651"]},{"raw_affiliation_string":"[Microelectron. & Comput. Syst. Lab., McGill Univ., Montreal, Que., Canada]","institution_ids":["https://openalex.org/I5023651"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I5023651"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":26,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"77","last_page":"80"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/vernier-scale","display_name":"Vernier scale","score":0.9423370361328125},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.7922605872154236},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6281089186668396},{"id":"https://openalex.org/keywords/static-timing-analysis","display_name":"Static timing analysis","score":0.5693759322166443},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5368075966835022},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5253878235816956},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.501957893371582},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.4314475655555725},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.24686923623085022},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.18879196047782898},{"id":"https://openalex.org/keywords/optics","display_name":"Optics","score":0.09461960196495056},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.09039071202278137},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.08735400438308716}],"concepts":[{"id":"https://openalex.org/C69710193","wikidata":"https://www.wikidata.org/wiki/Q14946576","display_name":"Vernier scale","level":2,"score":0.9423370361328125},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.7922605872154236},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6281089186668396},{"id":"https://openalex.org/C93682380","wikidata":"https://www.wikidata.org/wiki/Q2025226","display_name":"Static timing analysis","level":2,"score":0.5693759322166443},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5368075966835022},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5253878235816956},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.501957893371582},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.4314475655555725},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.24686923623085022},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.18879196047782898},{"id":"https://openalex.org/C120665830","wikidata":"https://www.wikidata.org/wiki/Q14620","display_name":"Optics","level":1,"score":0.09461960196495056},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.09039071202278137},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.08735400438308716}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/cicc.2002.1012770","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cicc.2002.1012770","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.4699999988079071,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320310709","display_name":"CMC Microsystems","ror":"https://ror.org/03k70ea39"},{"id":"https://openalex.org/F4320334593","display_name":"Natural Sciences and Engineering Research Council of Canada","ror":"https://ror.org/01h531d29"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W1691451471","https://openalex.org/W1830201611","https://openalex.org/W2052240377","https://openalex.org/W2062952706","https://openalex.org/W2130122989","https://openalex.org/W6679313578"],"related_works":["https://openalex.org/W2054844037","https://openalex.org/W2121182846","https://openalex.org/W2069827955","https://openalex.org/W3158414702","https://openalex.org/W3083903997","https://openalex.org/W2120912680","https://openalex.org/W3007479161","https://openalex.org/W3022509112","https://openalex.org/W2107482880","https://openalex.org/W2119823365"],"abstract_inverted_index":{"On-chip":[0],"timing":[1,35,44,95],"and":[2,18,71,90],"jitter":[3],"measurement":[4],"is":[5,28,39,57],"one":[6],"of":[7,86,97],"the":[8,22],"major":[9],"challenges":[10],"in":[11,59,73],"recent":[12],"years":[13],"for":[14],"characterizing":[15],"high-speed":[16],"analog":[17],"mixed-signal":[19],"circuits.":[20],"Although":[21],"Vernier":[23],"delay":[24],"line":[25],"(VDL)":[26],"method":[27],"a":[29,53,74,83,94],"common":[30],"approach":[31,56],"to":[32,62],"provide":[33],"high":[34],"resolution,":[36],"its":[37],"performance":[38],"limited":[40],"by":[41,47],"differential":[42],"nonlinearity":[43],"errors":[45],"created":[46],"component":[48],"mismatches.":[49],"In":[50],"this":[51],"paper,":[52],"single-stage":[54],"VDL":[55],"proposed":[58],"an":[60],"attempt":[61],"reduce":[63],"element-matching":[64],"requirements.":[65],"A":[66],"custom":[67],"IC":[68],"was":[69],"designed":[70],"fabricated":[72],"0.18":[75],"/spl":[76],"mu/m":[77],"CMOS":[78],"process.":[79],"The":[80],"design":[81],"requires":[82],"silicon":[84],"area":[85],"0.12":[87],"mm/sup":[88],"2/":[89],"measured":[91],"results":[92],"indicate":[93],"resolution":[96],"67":[98],"ps.":[99]},"counts_by_year":[{"year":2018,"cited_by_count":2},{"year":2017,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":2},{"year":2012,"cited_by_count":1}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}