{"id":"https://openalex.org/W4250027548","doi":"https://doi.org/10.1109/cgo.2019.8661187","title":"Automatic Generation of Warp-Level Primitives and Atomic Instructions for Fast and Portable Parallel Reduction on GPUs","display_name":"Automatic Generation of Warp-Level Primitives and Atomic Instructions for Fast and Portable Parallel Reduction on GPUs","publication_year":2019,"publication_date":"2019-02-01","ids":{"openalex":"https://openalex.org/W4250027548","doi":"https://doi.org/10.1109/cgo.2019.8661187"},"language":"en","primary_location":{"id":"doi:10.1109/cgo.2019.8661187","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cgo.2019.8661187","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IEEE/ACM International Symposium on Code Generation and Optimization (CGO)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5000022037","display_name":"Simon Garcia de Gonzalo","orcid":"https://orcid.org/0000-0002-5699-1793"},"institutions":[{"id":"https://openalex.org/I308392441","display_name":"International University of the Caribbean","ror":"https://ror.org/02rv57d03","country_code":"JM","type":"education","lineage":["https://openalex.org/I308392441"]}],"countries":["JM"],"is_corresponding":false,"raw_author_name":"Simon Garcia De Gonzalo","raw_affiliation_strings":["CS and Coordinated Science Lab, UIUC"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"CS and Coordinated Science Lab, UIUC","institution_ids":["https://openalex.org/I308392441"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5050532440","display_name":"Sitao Huang","orcid":"https://orcid.org/0000-0001-7669-1467"},"institutions":[{"id":"https://openalex.org/I308392441","display_name":"International University of the Caribbean","ror":"https://ror.org/02rv57d03","country_code":"JM","type":"education","lineage":["https://openalex.org/I308392441"]}],"countries":["JM"],"is_corresponding":false,"raw_author_name":"Sitao Huang","raw_affiliation_strings":["ECE and Coordinated Science Lab, UIUC"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"ECE and Coordinated Science Lab, UIUC","institution_ids":["https://openalex.org/I308392441"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5044416322","display_name":"Juan G\u00f3mez-Luna","orcid":"https://orcid.org/0000-0002-6514-1571"},"institutions":[{"id":"https://openalex.org/I35440088","display_name":"ETH Zurich","ror":"https://ror.org/05a28rw58","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I35440088"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Juan Gomez-Luna","raw_affiliation_strings":["Computer Science, ETH Zurich"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Computer Science, ETH Zurich","institution_ids":["https://openalex.org/I35440088"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110468921","display_name":"Simon David Hammond","orcid":null},"institutions":[{"id":"https://openalex.org/I4210104735","display_name":"Sandia National Laboratories","ror":"https://ror.org/01apwpt12","country_code":"US","type":"facility","lineage":["https://openalex.org/I1330989302","https://openalex.org/I198811213","https://openalex.org/I4210104735"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Simon Hammond","raw_affiliation_strings":["Scalable Computer Architecture, Sandia National Laboratories"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Scalable Computer Architecture, Sandia National Laboratories","institution_ids":["https://openalex.org/I4210104735"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5050695684","display_name":"Onur Mutlu","orcid":"https://orcid.org/0000-0002-0075-2312"},"institutions":[{"id":"https://openalex.org/I35440088","display_name":"ETH Zurich","ror":"https://ror.org/05a28rw58","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I35440088"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Onur Mutlu","raw_affiliation_strings":["Computer Science, ETH Zurich"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Computer Science, ETH Zurich","institution_ids":["https://openalex.org/I35440088"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5040404999","display_name":"Wen\u2010mei Hwu","orcid":"https://orcid.org/0000-0003-2532-5349"},"institutions":[{"id":"https://openalex.org/I308392441","display_name":"International University of the Caribbean","ror":"https://ror.org/02rv57d03","country_code":"JM","type":"education","lineage":["https://openalex.org/I308392441"]}],"countries":["JM"],"is_corresponding":false,"raw_author_name":"Wen-mei Hwu","raw_affiliation_strings":["ECE and Coordinated Science Lab, UIUC"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"ECE and Coordinated Science Lab, UIUC","institution_ids":["https://openalex.org/I308392441"]}]}],"institutions":[],"countries_distinct_count":3,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":28,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"73","last_page":"84"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12326","display_name":"Network Packet Processing and Optimization","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9973000288009644,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.892679750919342},{"id":"https://openalex.org/keywords/software-portability","display_name":"Software portability","score":0.8393748998641968},{"id":"https://openalex.org/keywords/compiler","display_name":"Compiler","score":0.7590184211730957},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5693130493164062},{"id":"https://openalex.org/keywords/just-in-time-compilation","display_name":"Just-in-time compilation","score":0.534984290599823},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.5214923620223999},{"id":"https://openalex.org/keywords/high-level-synthesis","display_name":"High-level synthesis","score":0.4689336121082306},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.44422969222068787},{"id":"https://openalex.org/keywords/programming-paradigm","display_name":"Programming paradigm","score":0.44327348470687866},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4403942823410034},{"id":"https://openalex.org/keywords/optimizing-compiler","display_name":"Optimizing compiler","score":0.4301370680332184},{"id":"https://openalex.org/keywords/runtime-system","display_name":"Runtime system","score":0.4260890781879425},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.41454699635505676},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.2960914373397827},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.2914574444293976}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.892679750919342},{"id":"https://openalex.org/C63000827","wikidata":"https://www.wikidata.org/wiki/Q3080428","display_name":"Software portability","level":2,"score":0.8393748998641968},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.7590184211730957},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5693130493164062},{"id":"https://openalex.org/C76782552","wikidata":"https://www.wikidata.org/wiki/Q110546","display_name":"Just-in-time compilation","level":3,"score":0.534984290599823},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.5214923620223999},{"id":"https://openalex.org/C58013763","wikidata":"https://www.wikidata.org/wiki/Q5754574","display_name":"High-level synthesis","level":3,"score":0.4689336121082306},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.44422969222068787},{"id":"https://openalex.org/C34165917","wikidata":"https://www.wikidata.org/wiki/Q188267","display_name":"Programming paradigm","level":2,"score":0.44327348470687866},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4403942823410034},{"id":"https://openalex.org/C190902152","wikidata":"https://www.wikidata.org/wiki/Q1325106","display_name":"Optimizing compiler","level":3,"score":0.4301370680332184},{"id":"https://openalex.org/C2780870223","wikidata":"https://www.wikidata.org/wiki/Q1004415","display_name":"Runtime system","level":2,"score":0.4260890781879425},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.41454699635505676},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.2960914373397827},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.2914574444293976},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/cgo.2019.8661187","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cgo.2019.8661187","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IEEE/ACM International Symposium on Code Generation and Optimization (CGO)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":29,"referenced_works":["https://openalex.org/W1762731526","https://openalex.org/W1964704819","https://openalex.org/W1988888548","https://openalex.org/W1988949113","https://openalex.org/W1989562524","https://openalex.org/W1997978901","https://openalex.org/W2055312318","https://openalex.org/W2078794610","https://openalex.org/W2088134616","https://openalex.org/W2090584832","https://openalex.org/W2094722168","https://openalex.org/W2104659803","https://openalex.org/W2160428323","https://openalex.org/W2256796310","https://openalex.org/W2294241027","https://openalex.org/W2294854295","https://openalex.org/W2296864832","https://openalex.org/W2506485539","https://openalex.org/W2515471963","https://openalex.org/W2883882491","https://openalex.org/W2884343737","https://openalex.org/W4230614322","https://openalex.org/W4231091366","https://openalex.org/W4236713805","https://openalex.org/W4240382083","https://openalex.org/W4251164127","https://openalex.org/W6670184316","https://openalex.org/W6697579854","https://openalex.org/W6832800064"],"related_works":["https://openalex.org/W2061483729","https://openalex.org/W2004337747","https://openalex.org/W3004536583","https://openalex.org/W1577067912","https://openalex.org/W2766929565","https://openalex.org/W2102888818","https://openalex.org/W4241029635","https://openalex.org/W2922037604","https://openalex.org/W2399320734","https://openalex.org/W100392937"],"abstract_inverted_index":{"Since":[0,14],"the":[1,20,46,53,68,76,127,221,231],"advent":[2],"of":[3,126,139,182,214,220,254],"GPU":[4,6,30,255],"computing,":[5],"hardware":[7,22,72,233],"has":[8],"evolved":[9],"at":[10],"a":[11,136,179,189,205,211,247],"fast":[12],"pace.":[13],"application":[15,31],"performance":[16,24,77,222,227],"heavily":[17,228],"depends":[18,229],"on":[19,187,230,264],"latest":[21,128,232],"improvements,":[23],"portability":[25,78,223],"is":[26,59,114,218],"extremely":[27],"challenging":[28],"for":[29,56,70,119,153],"library":[32,250],"developers.":[33],"Portability":[34],"becomes":[35],"even":[36,117],"more":[37],"difficult":[38],"when":[39],"new":[40,71,137,196],"low-level":[41],"instructions":[42,58,105,164,167],"are":[43],"added":[44],"to":[45,123,173,241,260],"ISA":[47],"(e.g.,":[48,61,106],"warp":[49,107,162],"shuffle":[50,108,163],"instructions)":[51],"or":[52,116],"microarchitectural":[54],"support":[55,103],"existing":[57],"improved":[60],"atomic":[62,110,166],"instructions).":[63],"Library":[64],"developers,":[65],"besides":[66],"re-tuning":[67],"code":[69],"features,":[73],"deal":[74],"with":[75],"issue":[79],"by":[80,185],"hand-writing":[81],"multiple":[82],"algorithm":[83],"versions":[84],"that":[85],"leverage":[86],"different":[87],"instruction":[88],"sets":[89],"and":[90,95,109,142,157,165,170,198,246,257],"microarchitectures.":[91],"High-level":[92],"programming":[93,121,155,244],"frameworks":[94],"Domain":[96],"Specific":[97],"Languages":[98],"(DSLs)":[99],"do":[100],"not":[101],"typically":[102],"lowlevel":[104],"instructions),":[111],"so":[112],"it":[113],"painful":[115],"impossible":[118],"these":[120,183],"systems":[122],"take":[124],"advantage":[125],"architectural":[129],"improvements.":[130,234],"In":[131],"this":[132],"work,":[133],"we":[134,201],"design":[135],"set":[138],"high-level":[140,154,190,243],"APIs":[141],"qualifiers,":[143],"as":[144,146,225],"well":[145],"specialized":[147],"Abstract":[148],"Syntax":[149],"Tree":[150],"(AST)":[151],"transformations":[152,160,184],"languages":[156],"DSLs.":[158],"Our":[159],"enable":[161],"(on":[168],"global":[169],"shared":[171],"memories)":[172],"be":[174],"easily":[175],"generated.":[176],"We":[177,235],"show":[178,258],"practical":[180],"implementation":[181],"building":[186,207],"Tangram,":[188],"kernel":[191],"synthesis":[192],"framework.":[193],"Using":[194],"our":[195,237],"language":[197],"compiler":[199],"extensions,":[200],"implement":[202],"parallel":[203,239],"reduction,":[204],"fundamental":[206],"block":[208],"used":[209],"in":[210],"wide":[212],"range":[213],"algorithms.":[215],"Parallel":[216],"reduction":[217,240],"representative":[219],"challenge,":[224],"its":[226],"compare":[236],"synthesized":[238],"another":[242],"framework":[245],"hand-written":[248,267],"high-performance":[249],"across":[251],"three":[252],"generations":[253],"architectures,":[256],"up":[259],"7.8\u00d7":[261],"speedup":[262],"(2\u00d7":[263],"average)":[265],"over":[266],"code.":[268]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":3},{"year":2024,"cited_by_count":3},{"year":2023,"cited_by_count":3},{"year":2022,"cited_by_count":3},{"year":2021,"cited_by_count":5},{"year":2020,"cited_by_count":8},{"year":2019,"cited_by_count":2}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}
