{"id":"https://openalex.org/W4239017056","doi":"https://doi.org/10.1109/cgo.2015.7054184","title":"Automatic data placement into GPU on-chip memory resources","display_name":"Automatic data placement into GPU on-chip memory resources","publication_year":2015,"publication_date":"2015-02-01","ids":{"openalex":"https://openalex.org/W4239017056","doi":"https://doi.org/10.1109/cgo.2015.7054184"},"language":"en","primary_location":{"id":"doi:10.1109/cgo.2015.7054184","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cgo.2015.7054184","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE/ACM International Symposium on Code Generation and Optimization (CGO)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100323120","display_name":"Chao Li","orcid":"https://orcid.org/0000-0002-6946-4335"},"institutions":[{"id":"https://openalex.org/I137902535","display_name":"North Carolina State University","ror":"https://ror.org/04tj63d06","country_code":"US","type":"education","lineage":["https://openalex.org/I137902535"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Chao Li","raw_affiliation_strings":["Department of Electrical and Computer Engineering, North Carolina State University"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, North Carolina State University","institution_ids":["https://openalex.org/I137902535"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5066072288","display_name":"Yi Yang","orcid":"https://orcid.org/0000-0001-9491-3668"},"institutions":[{"id":"https://openalex.org/I118347220","display_name":"NEC (Japan)","ror":"https://ror.org/04jndar25","country_code":"JP","type":"company","lineage":["https://openalex.org/I118347220"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Yi Yang","raw_affiliation_strings":["Department of Computer Systems Architecture, NEC Labs"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Systems Architecture, NEC Labs","institution_ids":["https://openalex.org/I118347220"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5002035343","display_name":"Zhen Lin","orcid":"https://orcid.org/0000-0002-7131-0159"},"institutions":[{"id":"https://openalex.org/I137902535","display_name":"North Carolina State University","ror":"https://ror.org/04tj63d06","country_code":"US","type":"education","lineage":["https://openalex.org/I137902535"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Zhen Lin","raw_affiliation_strings":["Department of Electrical and Computer Engineering, North Carolina State University"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, North Carolina State University","institution_ids":["https://openalex.org/I137902535"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5072755725","display_name":"Huiyang Zhou","orcid":null},"institutions":[{"id":"https://openalex.org/I137902535","display_name":"North Carolina State University","ror":"https://ror.org/04tj63d06","country_code":"US","type":"education","lineage":["https://openalex.org/I137902535"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Huiyang Zhou","raw_affiliation_strings":["Department of Electrical and Computer Engineering, North Carolina State University"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, North Carolina State University","institution_ids":["https://openalex.org/I137902535"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":19,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"23","last_page":"33"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.902906060218811},{"id":"https://openalex.org/keywords/compiler","display_name":"Compiler","score":0.775104284286499},{"id":"https://openalex.org/keywords/software-portability","display_name":"Software portability","score":0.7200717329978943},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.6794710159301758},{"id":"https://openalex.org/keywords/cas-latency","display_name":"CAS latency","score":0.43261951208114624},{"id":"https://openalex.org/keywords/thread","display_name":"Thread (computing)","score":0.4282014071941376},{"id":"https://openalex.org/keywords/shared-memory","display_name":"Shared memory","score":0.4224972128868103},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4065782427787781},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.29087406396865845},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.10165926814079285},{"id":"https://openalex.org/keywords/memory-controller","display_name":"Memory controller","score":0.0890674889087677}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.902906060218811},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.775104284286499},{"id":"https://openalex.org/C63000827","wikidata":"https://www.wikidata.org/wiki/Q3080428","display_name":"Software portability","level":2,"score":0.7200717329978943},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.6794710159301758},{"id":"https://openalex.org/C189930140","wikidata":"https://www.wikidata.org/wiki/Q1112878","display_name":"CAS latency","level":4,"score":0.43261951208114624},{"id":"https://openalex.org/C138101251","wikidata":"https://www.wikidata.org/wiki/Q213092","display_name":"Thread (computing)","level":2,"score":0.4282014071941376},{"id":"https://openalex.org/C133875982","wikidata":"https://www.wikidata.org/wiki/Q764810","display_name":"Shared memory","level":2,"score":0.4224972128868103},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4065782427787781},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.29087406396865845},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.10165926814079285},{"id":"https://openalex.org/C100800780","wikidata":"https://www.wikidata.org/wiki/Q1175867","display_name":"Memory controller","level":3,"score":0.0890674889087677}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/cgo.2015.7054184","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cgo.2015.7054184","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE/ACM International Symposium on Code Generation and Optimization (CGO)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":29,"referenced_works":["https://openalex.org/W73145541","https://openalex.org/W1039217118","https://openalex.org/W1517684295","https://openalex.org/W1970643910","https://openalex.org/W1979527452","https://openalex.org/W2005985523","https://openalex.org/W2020572638","https://openalex.org/W2059301531","https://openalex.org/W2072680607","https://openalex.org/W2080592089","https://openalex.org/W2083056254","https://openalex.org/W2084110734","https://openalex.org/W2093843662","https://openalex.org/W2123440268","https://openalex.org/W2129232868","https://openalex.org/W2130749431","https://openalex.org/W2162283062","https://openalex.org/W2186110056","https://openalex.org/W2398736067","https://openalex.org/W4206504442","https://openalex.org/W4229618172","https://openalex.org/W4245867598","https://openalex.org/W6603005809","https://openalex.org/W6627074740","https://openalex.org/W6630937574","https://openalex.org/W6638054461","https://openalex.org/W6673829052","https://openalex.org/W6674388195","https://openalex.org/W6686433102"],"related_works":["https://openalex.org/W107105315","https://openalex.org/W1584537303","https://openalex.org/W4388155270","https://openalex.org/W1872724644","https://openalex.org/W4367156293","https://openalex.org/W2750549761","https://openalex.org/W2128640905","https://openalex.org/W2011460173","https://openalex.org/W2021092055","https://openalex.org/W1979099492"],"abstract_inverted_index":{"Although":[0],"graphics":[1],"processing":[2],"units":[3],"(GPUs)":[4],"rely":[5],"on":[6,81,139,141,147,149],"thread-level":[7],"parallelism":[8],"to":[9,32,116],"hide":[10],"long":[11],"off-chip":[12],"memory":[13,20,40,53],"access":[14],"latency,":[15],"judicious":[16],"utilization":[17],"of":[18,112],"on-chip":[19,39,52,114],"resources,":[21],"including":[22],"register":[23],"files,":[24],"shared":[25],"memory,":[26],"and":[27,121,144],"data":[28,77,107],"caches,":[29],"is":[30,42],"critical":[31],"application":[33,47],"performance.":[34],"However,":[35],"explicitly":[36],"managing":[37],"GPU":[38,58,113],"resources":[41,54,115],"a":[43,64],"non-trivial":[44],"task":[45],"for":[46],"developers.":[48],"More":[49],"importantly,":[50],"as":[51],"vary":[55],"among":[56],"different":[57,110],"generations,":[59],"performance":[60,119,122,136],"portability":[61],"has":[62],"become":[63],"daunting":[65],"challenge.":[66],"In":[67],"this":[68,72],"paper,":[69],"we":[70],"tackle":[71],"problem":[73],"with":[74],"compiler-driven":[75],"automatic":[76],"placement.":[78],"We":[79],"focus":[80],"programs":[82,104],"that":[83],"have":[84],"already":[85],"been":[86],"reasonably":[87],"optimized":[88],"either":[89],"manually":[90],"by":[91,95,105,137,145],"programmers":[92],"or":[93],"automatically":[94],"compiler":[96,100,132],"tools.":[97],"Our":[98],"proposed":[99,131],"algorithms":[101],"refine":[102],"these":[103],"revising":[106],"placement":[108],"across":[109],"types":[111],"achieve":[117],"both":[118],"enhancement":[120],"portability.":[123],"Among":[124],"12":[125],"benchmarks":[126],"in":[127],"our":[128,130],"study,":[129],"algorithm":[133],"improves":[134],"the":[135],"1.76\u00d7":[138],"average":[140,148],"Nvidia":[142],"GTX480,":[143],"1.61\u00d7":[146],"GTX680.":[150]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":2},{"year":2017,"cited_by_count":4},{"year":2016,"cited_by_count":6}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}