{"id":"https://openalex.org/W2592983954","doi":"https://doi.org/10.1109/ccwc.2017.7868474","title":"MMC-based phase partitioning for data intensive applications","display_name":"MMC-based phase partitioning for data intensive applications","publication_year":2017,"publication_date":"2017-01-01","ids":{"openalex":"https://openalex.org/W2592983954","doi":"https://doi.org/10.1109/ccwc.2017.7868474","mag":"2592983954"},"language":"en","primary_location":{"id":"doi:10.1109/ccwc.2017.7868474","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ccwc.2017.7868474","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 IEEE 7th Annual Computing and Communication Workshop and Conference (CCWC)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5057262292","display_name":"Hakduran Koc","orcid":null},"institutions":[{"id":"https://openalex.org/I52913039","display_name":"University of Houston - Clear Lake","ror":"https://ror.org/01t817z14","country_code":"US","type":"education","lineage":["https://openalex.org/I52913039"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Hakduran Koc","raw_affiliation_strings":["University of Houston - Clear Lake, Houston, Texas, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Houston - Clear Lake, Houston, Texas, USA","institution_ids":["https://openalex.org/I52913039"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5102258245","display_name":"Mehmet Ucar","orcid":null},"institutions":[{"id":"https://openalex.org/I52913039","display_name":"University of Houston - Clear Lake","ror":"https://ror.org/01t817z14","country_code":"US","type":"education","lineage":["https://openalex.org/I52913039"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Mehmet Ucar","raw_affiliation_strings":["University of Houston - Clear Lake, Houston, Texas, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Houston - Clear Lake, Houston, Texas, USA","institution_ids":["https://openalex.org/I52913039"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I52913039"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.00846891,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9965000152587891,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9965000152587891,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9951000213623047,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12162","display_name":"Cellular Automata and Applications","score":0.9765999913215637,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8376110792160034},{"id":"https://openalex.org/keywords/memory-hierarchy","display_name":"Memory hierarchy","score":0.6199569702148438},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5366992354393005},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.4840833246707916},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.48151645064353943},{"id":"https://openalex.org/keywords/computation","display_name":"Computation","score":0.46799299120903015},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.45819979906082153},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.42952144145965576},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4230569005012512},{"id":"https://openalex.org/keywords/memory-architecture","display_name":"Memory architecture","score":0.42302364110946655},{"id":"https://openalex.org/keywords/hierarchy","display_name":"Hierarchy","score":0.4163798987865448},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.18589752912521362},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.10600897669792175},{"id":"https://openalex.org/keywords/overlay","display_name":"Overlay","score":0.09313306212425232}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8376110792160034},{"id":"https://openalex.org/C2778100165","wikidata":"https://www.wikidata.org/wiki/Q1589327","display_name":"Memory hierarchy","level":3,"score":0.6199569702148438},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5366992354393005},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.4840833246707916},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.48151645064353943},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.46799299120903015},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.45819979906082153},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.42952144145965576},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4230569005012512},{"id":"https://openalex.org/C2779602883","wikidata":"https://www.wikidata.org/wiki/Q15544750","display_name":"Memory architecture","level":2,"score":0.42302364110946655},{"id":"https://openalex.org/C31170391","wikidata":"https://www.wikidata.org/wiki/Q188619","display_name":"Hierarchy","level":2,"score":0.4163798987865448},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.18589752912521362},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.10600897669792175},{"id":"https://openalex.org/C136085584","wikidata":"https://www.wikidata.org/wiki/Q910289","display_name":"Overlay","level":2,"score":0.09313306212425232},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C34447519","wikidata":"https://www.wikidata.org/wiki/Q179522","display_name":"Market economy","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ccwc.2017.7868474","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ccwc.2017.7868474","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 IEEE 7th Annual Computing and Communication Workshop and Conference (CCWC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":22,"referenced_works":["https://openalex.org/W202945883","https://openalex.org/W1551757538","https://openalex.org/W2030567526","https://openalex.org/W2086329118","https://openalex.org/W2090809553","https://openalex.org/W2098582452","https://openalex.org/W2114514087","https://openalex.org/W2133077842","https://openalex.org/W2143100904","https://openalex.org/W2143620814","https://openalex.org/W2147259168","https://openalex.org/W2149590159","https://openalex.org/W2166800122","https://openalex.org/W2171006257","https://openalex.org/W3141114101","https://openalex.org/W4233673249","https://openalex.org/W4238826965","https://openalex.org/W4244816354","https://openalex.org/W4285719527","https://openalex.org/W6608152053","https://openalex.org/W6677200480","https://openalex.org/W6681260509"],"related_works":["https://openalex.org/W2035037799","https://openalex.org/W1971123707","https://openalex.org/W2465781960","https://openalex.org/W2160963468","https://openalex.org/W2107401056","https://openalex.org/W2128391030","https://openalex.org/W2900224194","https://openalex.org/W2005412429","https://openalex.org/W2116516372","https://openalex.org/W4389476357"],"abstract_inverted_index":{"In":[0],"this":[1],"paper,":[2],"we":[3],"present":[4],"a":[5,31,35,49,68],"technique":[6,44],"based":[7],"on":[8],"Matrix":[9],"Model":[10],"Computation":[11],"(MMC)":[12],"in":[13,34,56,67,87],"order":[14,57],"to":[15,58],"improve":[16,59],"the":[17,42,60,88],"performance":[18,100],"of":[19,62],"embedded":[20,77,96],"systems":[21],"that":[22,29],"run":[23],"data-intensive":[24,36],"applications.":[25],"Unlike":[26],"traditional":[27],"techniques":[28],"consider":[30],"loop":[32,50],"nest":[33,51],"application":[37],"as":[38],"one":[39],"execution":[40,54],"phase,":[41],"proposed":[43],"aims":[45],"at":[46],"efficiently":[47],"dividing":[48],"into":[52],"multiple":[53,85],"phases":[55],"utilization":[61],"dynamic":[63,104],"memory":[64,82,105],"management":[65,106],"schemes":[66],"more":[69],"efficient":[70],"way.":[71],"The":[72,90],"target":[73],"architecture":[74,97],"is":[75],"an":[76],"processor":[78],"with":[79,84],"software-managed":[80],"on-chip":[81],"components":[83],"levels":[86],"hierarchy.":[89],"experimental":[91],"results":[92],"presented":[93],"using":[94],"single-core":[95],"show":[98],"significant":[99],"improvements":[101],"over":[102],"available":[103],"schemes.":[107]},"counts_by_year":[],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
