{"id":"https://openalex.org/W2889319417","doi":"https://doi.org/10.1109/ccece.2018.8447736","title":"An Energy-Efficient Cache Architecture for Chip-Multiprocessors Based on Non-Uniformity Accesses","display_name":"An Energy-Efficient Cache Architecture for Chip-Multiprocessors Based on Non-Uniformity Accesses","publication_year":2018,"publication_date":"2018-05-01","ids":{"openalex":"https://openalex.org/W2889319417","doi":"https://doi.org/10.1109/ccece.2018.8447736","mag":"2889319417"},"language":"en","primary_location":{"id":"doi:10.1109/ccece.2018.8447736","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ccece.2018.8447736","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 IEEE Canadian Conference on Electrical &amp; Computer Engineering (CCECE)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5035876551","display_name":"Pooneh Safayenikoo","orcid":null},"institutions":[{"id":"https://openalex.org/I530967","display_name":"Toronto Metropolitan University","ror":"https://ror.org/05g13zd79","country_code":"CA","type":"education","lineage":["https://openalex.org/I530967"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Pooneh Safayenikoo","raw_affiliation_strings":["Electrical and Computer Engineering Department, Ryerson University, Toronto, Ontario, Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering Department, Ryerson University, Toronto, Ontario, Canada","institution_ids":["https://openalex.org/I530967"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5041995126","display_name":"Arghavan Asad","orcid":"https://orcid.org/0000-0001-9254-9479"},"institutions":[{"id":"https://openalex.org/I530967","display_name":"Toronto Metropolitan University","ror":"https://ror.org/05g13zd79","country_code":"CA","type":"education","lineage":["https://openalex.org/I530967"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Arghavan Asad","raw_affiliation_strings":["Electrical and Computer Engineering Department, Ryerson University, Toronto, Ontario, Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering Department, Ryerson University, Toronto, Ontario, Canada","institution_ids":["https://openalex.org/I530967"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5103283614","display_name":"Farah Mohammadi","orcid":"https://orcid.org/0009-0008-9947-3209"},"institutions":[{"id":"https://openalex.org/I530967","display_name":"Toronto Metropolitan University","ror":"https://ror.org/05g13zd79","country_code":"CA","type":"education","lineage":["https://openalex.org/I530967"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Farah Mohammadi","raw_affiliation_strings":["Electrical and Computer Engineering Department, Ryerson University, Toronto, Ontario, Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering Department, Ryerson University, Toronto, Ontario, Canada","institution_ids":["https://openalex.org/I530967"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I530967"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.08804297,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":96},"biblio":{"volume":"39","issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7954516410827637},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.7251307368278503},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5944919586181641},{"id":"https://openalex.org/keywords/cache-only-memory-architecture","display_name":"Cache-only memory architecture","score":0.5855837464332581},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5201176404953003},{"id":"https://openalex.org/keywords/parsec","display_name":"Parsec","score":0.5072755217552185},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.44854894280433655},{"id":"https://openalex.org/keywords/energy-consumption","display_name":"Energy consumption","score":0.44571590423583984},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.44466039538383484},{"id":"https://openalex.org/keywords/cache-algorithms","display_name":"Cache algorithms","score":0.4360145628452301},{"id":"https://openalex.org/keywords/efficient-energy-use","display_name":"Efficient energy use","score":0.43493330478668213},{"id":"https://openalex.org/keywords/memory-architecture","display_name":"Memory architecture","score":0.4134688377380371},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.4097452163696289},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.40637487173080444},{"id":"https://openalex.org/keywords/cache-coloring","display_name":"Cache coloring","score":0.3895982503890991},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.0721646249294281},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.07189536094665527}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7954516410827637},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.7251307368278503},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5944919586181641},{"id":"https://openalex.org/C3720319","wikidata":"https://www.wikidata.org/wiki/Q5015937","display_name":"Cache-only memory architecture","level":5,"score":0.5855837464332581},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5201176404953003},{"id":"https://openalex.org/C44060867","wikidata":"https://www.wikidata.org/wiki/Q12129","display_name":"Parsec","level":3,"score":0.5072755217552185},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.44854894280433655},{"id":"https://openalex.org/C2780165032","wikidata":"https://www.wikidata.org/wiki/Q16869822","display_name":"Energy consumption","level":2,"score":0.44571590423583984},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.44466039538383484},{"id":"https://openalex.org/C38556500","wikidata":"https://www.wikidata.org/wiki/Q13404475","display_name":"Cache algorithms","level":4,"score":0.4360145628452301},{"id":"https://openalex.org/C2742236","wikidata":"https://www.wikidata.org/wiki/Q924713","display_name":"Efficient energy use","level":2,"score":0.43493330478668213},{"id":"https://openalex.org/C2779602883","wikidata":"https://www.wikidata.org/wiki/Q15544750","display_name":"Memory architecture","level":2,"score":0.4134688377380371},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.4097452163696289},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.40637487173080444},{"id":"https://openalex.org/C201148951","wikidata":"https://www.wikidata.org/wiki/Q5015976","display_name":"Cache coloring","level":4,"score":0.3895982503890991},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0721646249294281},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.07189536094665527},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C150846664","wikidata":"https://www.wikidata.org/wiki/Q7602306","display_name":"Stars","level":2,"score":0.0},{"id":"https://openalex.org/C31972630","wikidata":"https://www.wikidata.org/wiki/Q844240","display_name":"Computer vision","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ccece.2018.8447736","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ccece.2018.8447736","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 IEEE Canadian Conference on Electrical &amp; Computer Engineering (CCECE)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.8999999761581421}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W1980072970","https://openalex.org/W1996246849","https://openalex.org/W2006312753","https://openalex.org/W2147657366","https://openalex.org/W2170382128","https://openalex.org/W2464177207","https://openalex.org/W2535176082","https://openalex.org/W2605398378","https://openalex.org/W2610938932","https://openalex.org/W3124382149","https://openalex.org/W4255812374","https://openalex.org/W6719768283","https://openalex.org/W6891879041"],"related_works":["https://openalex.org/W2734782074","https://openalex.org/W2114386333","https://openalex.org/W4307138321","https://openalex.org/W2098406302","https://openalex.org/W2079730482","https://openalex.org/W2206576460","https://openalex.org/W2538519144","https://openalex.org/W1733864318","https://openalex.org/W2217292995","https://openalex.org/W2541463506"],"abstract_inverted_index":{"With":[0],"technology":[1],"scaling":[2],"and":[3,28,45,136,204],"increasing":[4],"parallelism":[5],"levels":[6],"of":[7,12,30,33,51,73,101,115,133,143,169,174],"new":[8,126],"embedded":[9],"applications,":[10],"number":[11],"cores":[13,44],"in":[14,35,54,83,96,155,172],"chip-multiprocessors":[15],"(CMPs)":[16],"has":[17,56,120],"been":[18,57,121],"shifted":[19],"from":[20],"100":[21],"to":[22,128,130,151,158,176,206,229],"1000":[23],"cores.":[24],"To":[25],"efficiently":[26],"store":[27],"manipulate":[29],"large":[31],"amount":[32],"data":[34],"future":[36,84,97,110],"applications":[37],"and,":[38],"also,":[39],"decreasing":[40],"the":[41,49,74,140,166,170,214],"gap":[42],"between":[43],"off-chip":[46],"memory":[47,137],"accesses,":[48],"size":[50],"cache":[52,153,184,194,198],"systems":[53],"CMPs":[55,98,111],"dramatically":[58],"increased.":[59],"Since":[60],"on-chip":[61],"storage":[62],"systems,":[63],"particularly":[64],"last":[65,116],"level":[66,117],"caches,":[67],"occupy":[68],"as":[69,71,124],"much":[70],"50%":[72],"chip":[75],"area,":[76],"they":[77],"are":[78,103],"dominant":[79],"leakage":[80,147,178],"power":[81,90],"consumer":[82],"multi/many-core":[85],"systems.":[86],"In":[87,161],"this":[88,162],"context,":[89],"consumption":[91,149],"becomes":[92],"a":[93,125,182,230],"primary":[94],"concern":[95],"because":[99],"many":[100],"them":[102],"generally":[104],"limited":[105],"by":[106,220],"battery":[107],"lifetime.":[108],"For":[109],"architecting,":[112],"3D":[113,141],"stacking":[114],"caches":[118],"(LLCs)":[119],"recently":[122],"introduced":[123],"methodology":[127],"combat":[129],"performance":[131],"challenges":[132],"2D":[134],"integration":[135],"wall.":[138],"However,":[139],"design":[142],"LLCs":[144,175],"incurs":[145],"more":[146],"energy":[148],"compared":[150,228],"conventional":[152],"architectures":[154,195],"2Ds":[156],"due":[157],"dense":[159],"integration.":[160],"paper,":[163],"we":[164],"use":[165],"non-uniform":[167],"distribution":[168],"accesses":[171,203],"banks":[173,199],"decrease":[177],"energy.":[179],"We":[180],"propose":[181],"runtime":[183],"architecture.":[185],"The":[186,209],"proposed":[187,215],"architecture":[188],"that":[189,200,213],"is":[190],"based":[191],"on":[192,223],"nonuniform":[193],"(NUCA)":[196],"disables":[197],"have":[201],"low":[202],"leads":[205],"high":[207],"energy-efficiency.":[208],"experimental":[210],"results":[211],"show":[212],"method":[216],"improves":[217],"energy-delay":[218],"product":[219],"about":[221],"41%":[222],"average":[224],"under":[225],"PARSEC":[226],"benchmarks":[227],"recent":[231],"technique":[232],"named":[233],"EECache.":[234]},"counts_by_year":[{"year":2022,"cited_by_count":2}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
