{"id":"https://openalex.org/W1598257354","doi":"https://doi.org/10.1109/ccece.2015.7129316","title":"Design of a 50nW, 0.5V&lt;inf&gt;DD&lt;/inf&gt; sub-threshold OTA amplifier with indirect compensation technique and class AB output stage","display_name":"Design of a 50nW, 0.5V&lt;inf&gt;DD&lt;/inf&gt; sub-threshold OTA amplifier with indirect compensation technique and class AB output stage","publication_year":2015,"publication_date":"2015-05-01","ids":{"openalex":"https://openalex.org/W1598257354","doi":"https://doi.org/10.1109/ccece.2015.7129316","mag":"1598257354"},"language":"en","primary_location":{"id":"doi:10.1109/ccece.2015.7129316","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ccece.2015.7129316","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE 28th Canadian Conference on Electrical and Computer Engineering (CCECE)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5051497212","display_name":"Ranga Babu Ganta","orcid":null},"institutions":[{"id":"https://openalex.org/I145894827","display_name":"Indian Institute of Technology Kharagpur","ror":"https://ror.org/03w5sq511","country_code":"IN","type":"education","lineage":["https://openalex.org/I145894827"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Ranga Babu Ganta","raw_affiliation_strings":["Indian Institute of Technology Kharagpur, Kharagpur, West Bengal, India","Indian Inst. of Technology Kharagpur, Kharagpur West Bengal India"],"affiliations":[{"raw_affiliation_string":"Indian Institute of Technology Kharagpur, Kharagpur, West Bengal, India","institution_ids":["https://openalex.org/I145894827"]},{"raw_affiliation_string":"Indian Inst. of Technology Kharagpur, Kharagpur West Bengal India","institution_ids":["https://openalex.org/I145894827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103017462","display_name":"Mengye Cai","orcid":"https://orcid.org/0000-0002-7419-4747"},"institutions":[{"id":"https://openalex.org/I125749732","display_name":"Western University","ror":"https://ror.org/02grkyz14","country_code":"CA","type":"education","lineage":["https://openalex.org/I125749732"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Mengye Cai","raw_affiliation_strings":["School of Electrical and Computer Engineering, Western University, London, Ontario, Canada"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Western University, London, Ontario, Canada","institution_ids":["https://openalex.org/I125749732"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5005203613","display_name":"Kyle Fricke","orcid":"https://orcid.org/0000-0002-9036-4654"},"institutions":[{"id":"https://openalex.org/I125749732","display_name":"Western University","ror":"https://ror.org/02grkyz14","country_code":"CA","type":"education","lineage":["https://openalex.org/I125749732"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Kyle Fricke","raw_affiliation_strings":["School of Electrical and Computer Engineering, Western University, London, Ontario, Canada"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Western University, London, Ontario, Canada","institution_ids":["https://openalex.org/I125749732"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5064325216","display_name":"Robert Sobot","orcid":null},"institutions":[{"id":"https://openalex.org/I125749732","display_name":"Western University","ror":"https://ror.org/02grkyz14","country_code":"CA","type":"education","lineage":["https://openalex.org/I125749732"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Robert Sobot","raw_affiliation_strings":["School of Electrical and Computer Engineering, Western University, London, Ontario, Canada"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Western University, London, Ontario, Canada","institution_ids":["https://openalex.org/I125749732"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5051497212"],"corresponding_institution_ids":["https://openalex.org/I145894827"],"apc_list":null,"apc_paid":null,"fwci":0.3541,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.60835628,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":"1","issue":null,"first_page":"432","last_page":"435"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11601","display_name":"Neuroscience and Neural Engineering","score":0.9973999857902527,"subfield":{"id":"https://openalex.org/subfields/2804","display_name":"Cellular and Molecular Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/capacitor","display_name":"Capacitor","score":0.6611706018447876},{"id":"https://openalex.org/keywords/amplifier","display_name":"Amplifier","score":0.6451943516731262},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.5893852114677429},{"id":"https://openalex.org/keywords/frequency-compensation","display_name":"Frequency compensation","score":0.5593944191932678},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.5592253804206848},{"id":"https://openalex.org/keywords/compensation","display_name":"Compensation (psychology)","score":0.5461176633834839},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5425198674201965},{"id":"https://openalex.org/keywords/operational-amplifier","display_name":"Operational amplifier","score":0.5381179451942444},{"id":"https://openalex.org/keywords/stage","display_name":"Stage (stratigraphy)","score":0.5062479376792908},{"id":"https://openalex.org/keywords/biasing","display_name":"Biasing","score":0.44965410232543945},{"id":"https://openalex.org/keywords/direct-coupled-amplifier","display_name":"Direct-coupled amplifier","score":0.4362519085407257},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.37569528818130493},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.35816648602485657},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.30370599031448364},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.28932562470436096}],"concepts":[{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.6611706018447876},{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.6451943516731262},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.5893852114677429},{"id":"https://openalex.org/C131782439","wikidata":"https://www.wikidata.org/wiki/Q1455581","display_name":"Frequency compensation","level":4,"score":0.5593944191932678},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.5592253804206848},{"id":"https://openalex.org/C2780023022","wikidata":"https://www.wikidata.org/wiki/Q1338171","display_name":"Compensation (psychology)","level":2,"score":0.5461176633834839},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5425198674201965},{"id":"https://openalex.org/C145366948","wikidata":"https://www.wikidata.org/wiki/Q178947","display_name":"Operational amplifier","level":4,"score":0.5381179451942444},{"id":"https://openalex.org/C146357865","wikidata":"https://www.wikidata.org/wiki/Q1123245","display_name":"Stage (stratigraphy)","level":2,"score":0.5062479376792908},{"id":"https://openalex.org/C20254490","wikidata":"https://www.wikidata.org/wiki/Q719550","display_name":"Biasing","level":3,"score":0.44965410232543945},{"id":"https://openalex.org/C172218469","wikidata":"https://www.wikidata.org/wiki/Q4477697","display_name":"Direct-coupled amplifier","level":5,"score":0.4362519085407257},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.37569528818130493},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.35816648602485657},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.30370599031448364},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.28932562470436096},{"id":"https://openalex.org/C15744967","wikidata":"https://www.wikidata.org/wiki/Q9418","display_name":"Psychology","level":0,"score":0.0},{"id":"https://openalex.org/C151730666","wikidata":"https://www.wikidata.org/wiki/Q7205","display_name":"Paleontology","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C11171543","wikidata":"https://www.wikidata.org/wiki/Q41630","display_name":"Psychoanalysis","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ccece.2015.7129316","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ccece.2015.7129316","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE 28th Canadian Conference on Electrical and Computer Engineering (CCECE)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8500000238418579,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320310709","display_name":"CMC Microsystems","ror":"https://ror.org/03k70ea39"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W1925766216","https://openalex.org/W1972150182","https://openalex.org/W1979902309","https://openalex.org/W2035061364","https://openalex.org/W2073253416","https://openalex.org/W2114272401","https://openalex.org/W2148207988","https://openalex.org/W2149399676","https://openalex.org/W2155509608","https://openalex.org/W2166282246","https://openalex.org/W6640121083","https://openalex.org/W6677395663","https://openalex.org/W6682830445"],"related_works":["https://openalex.org/W3106125200","https://openalex.org/W2505524053","https://openalex.org/W2104805973","https://openalex.org/W2921550143","https://openalex.org/W4240158017","https://openalex.org/W64433238","https://openalex.org/W2379608080","https://openalex.org/W2351584259","https://openalex.org/W2094356678","https://openalex.org/W2167952956"],"abstract_inverted_index":{"We":[0],"present":[1],"analysis":[2],"and":[3,18,42],"design":[4],"of":[5,51,62],"a":[6,48],"0.5V":[7],"<sub":[8],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[9],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">DD</sub>":[10],"two":[11],"stage":[12,22],"OTA":[13],"amplifier":[14,31],"with":[15,47,59],"current-buffer":[16],"compensation":[17],"class":[19],"AB":[20],"output":[21],"in":[23,29,33],"90nm":[24],"CMOS":[25],"technology.":[26],"All":[27],"transistors":[28],"the":[30,34],"operate":[32],"sub-threshold":[35],"region":[36],"while":[37],"achieving":[38],"86dB":[39],"DC":[40],"gain":[41,44],"unity":[43],"frequency":[45],"40.5kHz":[46],"load":[49],"capacitor":[50],"30pF.":[52],"The":[53],"total":[54],"power":[55],"dissipation":[56],"is":[57],"50nW":[58],"bias":[60],"current":[61],"10nA.":[63]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2017,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
