{"id":"https://openalex.org/W4248275050","doi":"https://doi.org/10.1109/cases.2013.6662527","title":"SPM-Sieve: A framework for assisting data partitioning in scratch pad memory based systems","display_name":"SPM-Sieve: A framework for assisting data partitioning in scratch pad memory based systems","publication_year":2013,"publication_date":"2013-09-01","ids":{"openalex":"https://openalex.org/W4248275050","doi":"https://doi.org/10.1109/cases.2013.6662527"},"language":"en","primary_location":{"id":"doi:10.1109/cases.2013.6662527","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cases.2013.6662527","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 International Conference on Compilers, Architecture and Synthesis for Embedded Systems (CASES)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5110897564","display_name":"Prasenjit Chakraborty","orcid":null},"institutions":[{"id":"https://openalex.org/I4210146682","display_name":"Intel (India)","ror":"https://ror.org/04f2n1245","country_code":"IN","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210146682"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Prasenjit Chakraborty","raw_affiliation_strings":["Intel Technology India Pvt. Ltd., Bangalore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Technology India Pvt. Ltd., Bangalore","institution_ids":["https://openalex.org/I4210146682"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5027215692","display_name":"Preeti Ranjan Panda","orcid":"https://orcid.org/0000-0002-2508-7531"},"institutions":[{"id":"https://openalex.org/I68891433","display_name":"Indian Institute of Technology Delhi","ror":"https://ror.org/049tgcd06","country_code":"IN","type":"education","lineage":["https://openalex.org/I68891433"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Preeti Ranjan Panda","raw_affiliation_strings":["Department of Computer Science & Engineering, Indian Institute of Technology Delhi, New Delhi"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science & Engineering, Indian Institute of Technology Delhi, New Delhi","institution_ids":["https://openalex.org/I68891433"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.9515,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.78565277,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":"6","issue":null,"first_page":"1","last_page":"10"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8130205869674683},{"id":"https://openalex.org/keywords/memory-hierarchy","display_name":"Memory hierarchy","score":0.62413489818573},{"id":"https://openalex.org/keywords/partition","display_name":"Partition (number theory)","score":0.5803534388542175},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.558036744594574},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5004377365112305},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4465672969818115},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.43998631834983826},{"id":"https://openalex.org/keywords/cache-only-memory-architecture","display_name":"Cache-only memory architecture","score":0.43000710010528564},{"id":"https://openalex.org/keywords/hierarchy","display_name":"Hierarchy","score":0.4282175302505493},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.3783072531223297},{"id":"https://openalex.org/keywords/cache-coloring","display_name":"Cache coloring","score":0.18456977605819702}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8130205869674683},{"id":"https://openalex.org/C2778100165","wikidata":"https://www.wikidata.org/wiki/Q1589327","display_name":"Memory hierarchy","level":3,"score":0.62413489818573},{"id":"https://openalex.org/C42812","wikidata":"https://www.wikidata.org/wiki/Q1082910","display_name":"Partition (number theory)","level":2,"score":0.5803534388542175},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.558036744594574},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5004377365112305},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4465672969818115},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.43998631834983826},{"id":"https://openalex.org/C3720319","wikidata":"https://www.wikidata.org/wiki/Q5015937","display_name":"Cache-only memory architecture","level":5,"score":0.43000710010528564},{"id":"https://openalex.org/C31170391","wikidata":"https://www.wikidata.org/wiki/Q188619","display_name":"Hierarchy","level":2,"score":0.4282175302505493},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.3783072531223297},{"id":"https://openalex.org/C201148951","wikidata":"https://www.wikidata.org/wiki/Q5015976","display_name":"Cache coloring","level":4,"score":0.18456977605819702},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C34447519","wikidata":"https://www.wikidata.org/wiki/Q179522","display_name":"Market economy","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/cases.2013.6662527","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cases.2013.6662527","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 International Conference on Compilers, Architecture and Synthesis for Embedded Systems (CASES)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.5799999833106995,"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":40,"referenced_works":["https://openalex.org/W56226570","https://openalex.org/W1551757538","https://openalex.org/W1985515302","https://openalex.org/W1990024436","https://openalex.org/W1994115836","https://openalex.org/W2006250936","https://openalex.org/W2021435491","https://openalex.org/W2059807497","https://openalex.org/W2061650414","https://openalex.org/W2079842646","https://openalex.org/W2089083257","https://openalex.org/W2101391071","https://openalex.org/W2120629815","https://openalex.org/W2123470671","https://openalex.org/W2130007585","https://openalex.org/W2132332770","https://openalex.org/W2136434791","https://openalex.org/W2141192390","https://openalex.org/W2144392242","https://openalex.org/W2154213129","https://openalex.org/W2154632001","https://openalex.org/W2157829063","https://openalex.org/W2163270257","https://openalex.org/W2168099423","https://openalex.org/W2170808459","https://openalex.org/W2397454561","https://openalex.org/W3140293119","https://openalex.org/W3141150936","https://openalex.org/W3150601291","https://openalex.org/W4239813889","https://openalex.org/W4240326407","https://openalex.org/W4241057782","https://openalex.org/W4241166746","https://openalex.org/W4244816354","https://openalex.org/W4255545170","https://openalex.org/W6602337924","https://openalex.org/W6680960445","https://openalex.org/W6683189218","https://openalex.org/W6712681754","https://openalex.org/W7005867534"],"related_works":["https://openalex.org/W2167303720","https://openalex.org/W2497617944","https://openalex.org/W15724499","https://openalex.org/W2350803493","https://openalex.org/W2532806932","https://openalex.org/W1981002423","https://openalex.org/W1484055662","https://openalex.org/W2380172837","https://openalex.org/W2007917904","https://openalex.org/W4236977628"],"abstract_inverted_index":{"Modern":[0],"system":[1,26,144],"architectures":[2,132,257],"sometimes":[3],"include":[4],"scratch":[5],"pad":[6],"memories":[7],"(SPM)":[8],"in":[9,20,142,185],"their":[10,17,86],"memory":[11,65,141,152],"hierarchy":[12],"to":[13,23,62,90,112,156,198],"take":[14],"advantage":[15],"of":[16,73,109,137,159,208,217],"simpler":[18],"design,":[19],"an":[21,168],"attempt":[22],"meet":[24],"the":[25,60,74,138,143,151,186,204,236,240],"area,":[27],"performance,":[28],"and":[29,53,55,93,107,126,146,170,206,246,259],"power":[30],"budget.":[31],"These":[32],"systems":[33,43,49,58,79],"employing":[34],"SPM":[35,77,114,130,255],"can":[36],"be":[37],"broadly":[38],"categorized":[39],"as:":[40],"(a)":[41],"cacheless":[42],"with":[44,50,59,258],"only":[45,178],"SPM,":[46,54,69],"(b)":[47],"hybrid":[48],"both":[51],"cache":[52],"(c)":[56],"reconfigurable":[57],"provision":[61],"reconfigure":[63],"local":[64],"as":[66],"either":[67],"cache,":[68],"or":[70],"a":[71,123,191,214,222],"combination":[72],"two.":[75],"However":[76],"based":[78,115,131,256],"have":[80],"needed":[81],"larger":[82],"efforts":[83],"spent":[84],"on":[85,213],"programming,":[87],"mainly":[88],"due":[89],"allocating":[91],"data":[92,95,183],"orchestrating":[94],"transfers":[96],"explicitly":[97],"by":[98,165,210,231,239],"soft-ware.":[99],"Tight":[100],"product":[101],"development":[102,106],"cycles":[103],"require":[104],"faster":[105],"porting":[108],"diverse":[110],"applications":[111],"multiple":[113],"architectures.":[116],"In":[117],"this":[118],"paper":[119],"we":[120],"present":[121],"SPM-Sieve,":[122],"profile-based":[124],"tool":[125,241],"framework":[127],"targeted":[128,220],"for":[129,193,221,254],"that":[133,248],"generates":[134],"partitioning":[135],"decisions":[136],"first":[139,224],"level":[140,225],"hierarchy,":[145],"suggests":[147],"object":[148],"mapping":[149],"amongst":[150],"partitions":[153],"without":[154,260],"resorting":[155],"detailed":[157],"simulation":[158,233],"all":[160],"configurations.":[161],"This":[162],"is":[163],"done":[164],"natively":[166],"executing":[167],"application":[169],"using":[171],"minimal":[172],"target":[173],"architecture":[174],"specification,":[175],"which":[176],"not":[177],"provides":[179,190],"early":[180],"information":[181],"influencing":[182],"organization":[184],"application,":[187],"but":[188],"also":[189],"foundation":[192],"other":[194],"more":[195],"sophisticated":[196],"algorithms":[197],"produce":[199],"optimized":[200],"allocations.":[201],"We":[202,227],"demonstrate":[203],"utility":[205],"generality":[207],"SPM-Sieve":[209],"evaluating":[211],"it":[212],"large":[215],"number":[216],"SPEC2000":[218],"benchmarks":[219],"128KB":[223],"memory.":[226],"evaluate":[228],"its":[229,249],"effectiveness":[230],"performing":[232],"studies":[234],"comparing":[235],"partition":[237,244],"suggested":[238],"against":[242],"varying":[243],"sizes,":[245],"observe":[247],"suggestions":[250],"are":[251],"very":[252],"competitive":[253],"caches.":[261]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}