{"id":"https://openalex.org/W2915289217","doi":"https://doi.org/10.1109/cahpc.2018.8645850","title":"Energy Efficient Parallel K-Means Clustering for an Intel\u00ae Hybrid Multi-Chip Package","display_name":"Energy Efficient Parallel K-Means Clustering for an Intel\u00ae Hybrid Multi-Chip Package","publication_year":2018,"publication_date":"2018-09-01","ids":{"openalex":"https://openalex.org/W2915289217","doi":"https://doi.org/10.1109/cahpc.2018.8645850","mag":"2915289217"},"language":"en","primary_location":{"id":"doi:10.1109/cahpc.2018.8645850","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cahpc.2018.8645850","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 30th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5055079558","display_name":"Matheus A. Souza","orcid":"https://orcid.org/0000-0001-9242-9282"},"institutions":[{"id":"https://openalex.org/I170935008","display_name":"Pontif\u00edcia Universidade Cat\u00f3lica de Minas Gerais","ror":"https://ror.org/03j1rr444","country_code":"BR","type":"education","lineage":["https://openalex.org/I170935008"]}],"countries":["BR"],"is_corresponding":true,"raw_author_name":"Matheus A. Souza","raw_affiliation_strings":["Pontifical Catholic University of Minas Gerais (PUC Minas), Belo Horizonte, Brazil"],"affiliations":[{"raw_affiliation_string":"Pontifical Catholic University of Minas Gerais (PUC Minas), Belo Horizonte, Brazil","institution_ids":["https://openalex.org/I170935008"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5018611891","display_name":"Lucas A. Maciel","orcid":"https://orcid.org/0000-0001-7595-0877"},"institutions":[{"id":"https://openalex.org/I170935008","display_name":"Pontif\u00edcia Universidade Cat\u00f3lica de Minas Gerais","ror":"https://ror.org/03j1rr444","country_code":"BR","type":"education","lineage":["https://openalex.org/I170935008"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Lucas A. Maciel","raw_affiliation_strings":["Pontifical Catholic University of Minas Gerais (PUC Minas), Belo Horizonte, Brazil"],"affiliations":[{"raw_affiliation_string":"Pontifical Catholic University of Minas Gerais (PUC Minas), Belo Horizonte, Brazil","institution_ids":["https://openalex.org/I170935008"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5056577204","display_name":"Pedro Henrique Penna","orcid":"https://orcid.org/0000-0003-3617-2915"},"institutions":[{"id":"https://openalex.org/I170935008","display_name":"Pontif\u00edcia Universidade Cat\u00f3lica de Minas Gerais","ror":"https://ror.org/03j1rr444","country_code":"BR","type":"education","lineage":["https://openalex.org/I170935008"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Pedro Henrique Penna","raw_affiliation_strings":["Pontifical Catholic University of Minas Gerais (PUC Minas), Belo Horizonte, Brazil"],"affiliations":[{"raw_affiliation_string":"Pontifical Catholic University of Minas Gerais (PUC Minas), Belo Horizonte, Brazil","institution_ids":["https://openalex.org/I170935008"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5079249940","display_name":"Henrique Cota de Freitas","orcid":"https://orcid.org/0000-0001-9722-1093"},"institutions":[{"id":"https://openalex.org/I170935008","display_name":"Pontif\u00edcia Universidade Cat\u00f3lica de Minas Gerais","ror":"https://ror.org/03j1rr444","country_code":"BR","type":"education","lineage":["https://openalex.org/I170935008"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Henrique C. Freitas","raw_affiliation_strings":["Pontifical Catholic University of Minas Gerais (PUC Minas), Belo Horizonte, Brazil"],"affiliations":[{"raw_affiliation_string":"Pontifical Catholic University of Minas Gerais (PUC Minas), Belo Horizonte, Brazil","institution_ids":["https://openalex.org/I170935008"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5055079558"],"corresponding_institution_ids":["https://openalex.org/I170935008"],"apc_list":null,"apc_paid":null,"fwci":1.2623,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.80017111,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"abs 1707 2919","issue":null,"first_page":"372","last_page":"379"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12326","display_name":"Network Packet Processing and Optimization","score":0.9980999827384949,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11269","display_name":"Algorithms and Data Compression","score":0.9973999857902527,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8407735824584961},{"id":"https://openalex.org/keywords/xeon","display_name":"Xeon","score":0.7492760419845581},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6854465007781982},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.6389811635017395},{"id":"https://openalex.org/keywords/cluster-analysis","display_name":"Cluster analysis","score":0.6324293613433838},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5391120910644531},{"id":"https://openalex.org/keywords/efficient-energy-use","display_name":"Efficient energy use","score":0.5337551236152649},{"id":"https://openalex.org/keywords/xeon-phi","display_name":"Xeon Phi","score":0.4795893728733063},{"id":"https://openalex.org/keywords/low-latency","display_name":"Low latency (capital markets)","score":0.4663281738758087},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.45022791624069214},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.34228530526161194},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.11332392692565918}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8407735824584961},{"id":"https://openalex.org/C145108525","wikidata":"https://www.wikidata.org/wiki/Q656154","display_name":"Xeon","level":2,"score":0.7492760419845581},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6854465007781982},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.6389811635017395},{"id":"https://openalex.org/C73555534","wikidata":"https://www.wikidata.org/wiki/Q622825","display_name":"Cluster analysis","level":2,"score":0.6324293613433838},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5391120910644531},{"id":"https://openalex.org/C2742236","wikidata":"https://www.wikidata.org/wiki/Q924713","display_name":"Efficient energy use","level":2,"score":0.5337551236152649},{"id":"https://openalex.org/C96972482","wikidata":"https://www.wikidata.org/wiki/Q1049168","display_name":"Xeon Phi","level":2,"score":0.4795893728733063},{"id":"https://openalex.org/C46637626","wikidata":"https://www.wikidata.org/wiki/Q6693015","display_name":"Low latency (capital markets)","level":2,"score":0.4663281738758087},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.45022791624069214},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.34228530526161194},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.11332392692565918},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/cahpc.2018.8645850","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cahpc.2018.8645850","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 30th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8899999856948853,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":36,"referenced_works":["https://openalex.org/W66669857","https://openalex.org/W1656664476","https://openalex.org/W1989761046","https://openalex.org/W2001159324","https://openalex.org/W2031282237","https://openalex.org/W2041908012","https://openalex.org/W2127218421","https://openalex.org/W2150593711","https://openalex.org/W2431414725","https://openalex.org/W2467043670","https://openalex.org/W2524901373","https://openalex.org/W2525637167","https://openalex.org/W2552194367","https://openalex.org/W2565516711","https://openalex.org/W2574797063","https://openalex.org/W2585774018","https://openalex.org/W2613626030","https://openalex.org/W2618398681","https://openalex.org/W2735364069","https://openalex.org/W2766347095","https://openalex.org/W2786635306","https://openalex.org/W2788854694","https://openalex.org/W2792974515","https://openalex.org/W2795294936","https://openalex.org/W2804227091","https://openalex.org/W2806638365","https://openalex.org/W2891911973","https://openalex.org/W2892187475","https://openalex.org/W2948704197","https://openalex.org/W3100789280","https://openalex.org/W6602808566","https://openalex.org/W6678914141","https://openalex.org/W6738890648","https://openalex.org/W6748756668","https://openalex.org/W6749390952","https://openalex.org/W6749457339"],"related_works":["https://openalex.org/W1974923383","https://openalex.org/W2475524688","https://openalex.org/W2739740241","https://openalex.org/W2085105049","https://openalex.org/W2592417500","https://openalex.org/W2526069705","https://openalex.org/W2024016913","https://openalex.org/W2019153376","https://openalex.org/W2981664121","https://openalex.org/W2796552083"],"abstract_inverted_index":{"FPGA":[0,64],"devices":[1],"have":[2],"been":[3],"proving":[4],"to":[5,9,32,119,130,145],"be":[6,33],"good":[7],"candidates":[8],"accelerate":[10],"applications":[11,20],"from":[12,117],"different":[13],"research":[14],"topics.":[15],"For":[16],"instance,":[17],"machine":[18],"learning":[19],"such":[21],"as":[22],"K-Means":[23,87],"clustering":[24,88],"usually":[25],"relies":[26],"on":[27],"large":[28],"amount":[29],"of":[30,85,132,158],"data":[31,75],"processed,":[34],"and,":[35],"despite":[36],"the":[37,66,86,106,114,164,169],"performance":[38,133],"offered":[39],"by":[40],"other":[41,101],"architectures,":[42],"FPGAs":[43],"can":[44],"offer":[45],"better":[46],"energy":[47,111,147],"efficiency.":[48],"With":[49],"that":[50,58,105],"in":[51,65],"mind,":[52],"Intel":[53],"has":[54],"launched":[55],"a":[56,60,82,156],"platform":[57,108],"integrates":[59],"multicore":[61],"and":[62,72,97,123,128,162],"an":[63,150],"same":[67],"package,":[68],"enabling":[69],"low":[70],"latency":[71],"coherent":[73],"fine-grained":[74],"offload.":[76],"In":[77],"this":[78,91],"paper,":[79],"we":[80],"present":[81],"parallel":[83],"implementation":[84],"algorithm,":[89],"for":[90],"novel":[92],"platform,":[93],"using":[94],"OpenCL":[95],"language,":[96],"compared":[98],"it":[99,142],"against":[100],"platforms.":[102],"We":[103],"found":[104],"CPU+FPGA":[107],"was":[109,135,143,173],"more":[110],"efficient":[112,148],"than":[113,149],"CPU-only":[115],"approach":[116],"70.71%":[118],"85.92%,":[120],"with":[121,137],"Standard":[122,170],"Tiny":[124,138],"input":[125,139,171],"sizes":[126],"respectively,":[127],"up":[129,144],"68.21%":[131],"improvement":[134],"obtained":[136],"size.":[140],"Furthermore,":[141],"7.2\u00d7more":[146],"Intel\u00ae":[151],"Xeon":[152],"Phi":[153],"\u2122,":[154],"21.5\u00d7than":[155],"cluster":[157],"Raspberry":[159],"Pi":[160],"boards,":[161],"3.8\u00d7than":[163],"low-power":[165],"MPPA-256":[166],"architecture,":[167],"when":[168],"size":[172],"used.":[174]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2021,"cited_by_count":3},{"year":2020,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
