{"id":"https://openalex.org/W1997326530","doi":"https://doi.org/10.1109/cadcg.2009.5246838","title":"Ant colony optimization for symmetrical FPGA placement","display_name":"Ant colony optimization for symmetrical FPGA placement","publication_year":2009,"publication_date":"2009-08-01","ids":{"openalex":"https://openalex.org/W1997326530","doi":"https://doi.org/10.1109/cadcg.2009.5246838","mag":"1997326530"},"language":"en","primary_location":{"id":"doi:10.1109/cadcg.2009.5246838","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cadcg.2009.5246838","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 11th IEEE International Conference on Computer-Aided Design and Computer Graphics","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5042930286","display_name":"Kai Wang","orcid":"https://orcid.org/0000-0001-6346-3529"},"institutions":[{"id":"https://openalex.org/I196699116","display_name":"Wuhan University of Technology","ror":"https://ror.org/03fe7t173","country_code":"CN","type":"education","lineage":["https://openalex.org/I196699116"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Kai Wang","raw_affiliation_strings":["School of Computer Science and Technology, Wuhan University of Technology, WuHan, China","School of Computer Science and Technology, Wuhan University of Technology, China#TAB#"],"affiliations":[{"raw_affiliation_string":"School of Computer Science and Technology, Wuhan University of Technology, WuHan, China","institution_ids":["https://openalex.org/I196699116"]},{"raw_affiliation_string":"School of Computer Science and Technology, Wuhan University of Technology, China#TAB#","institution_ids":["https://openalex.org/I196699116"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5054900679","display_name":"Ning Xu","orcid":"https://orcid.org/0000-0002-7526-4356"},"institutions":[{"id":"https://openalex.org/I196699116","display_name":"Wuhan University of Technology","ror":"https://ror.org/03fe7t173","country_code":"CN","type":"education","lineage":["https://openalex.org/I196699116"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Ning Xu","raw_affiliation_strings":["School of Computer Science and Technology, Wuhan University of Technology, WuHan, China","School of Computer Science and Technology, Wuhan University of Technology, China#TAB#"],"affiliations":[{"raw_affiliation_string":"School of Computer Science and Technology, Wuhan University of Technology, WuHan, China","institution_ids":["https://openalex.org/I196699116"]},{"raw_affiliation_string":"School of Computer Science and Technology, Wuhan University of Technology, China#TAB#","institution_ids":["https://openalex.org/I196699116"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5042930286"],"corresponding_institution_ids":["https://openalex.org/I196699116"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":9,"citation_normalized_percentile":{"value":0.07454779,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"561","last_page":"563"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9873999953269958,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9869999885559082,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.8974291086196899},{"id":"https://openalex.org/keywords/ant-colony-optimization-algorithms","display_name":"Ant colony optimization algorithms","score":0.8390729427337646},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.7703576683998108},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6887397766113281},{"id":"https://openalex.org/keywords/channel","display_name":"Channel (broadcasting)","score":0.5415565967559814},{"id":"https://openalex.org/keywords/digital-electronics","display_name":"Digital electronics","score":0.5086711049079895},{"id":"https://openalex.org/keywords/gate-array","display_name":"Gate array","score":0.4753182530403137},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.43213313817977905},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3836643099784851},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.3302130103111267},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.32665979862213135},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.2268819808959961},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.21474754810333252},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.20111745595932007},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.08727702498435974}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8974291086196899},{"id":"https://openalex.org/C40128228","wikidata":"https://www.wikidata.org/wiki/Q460851","display_name":"Ant colony optimization algorithms","level":2,"score":0.8390729427337646},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.7703576683998108},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6887397766113281},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.5415565967559814},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.5086711049079895},{"id":"https://openalex.org/C114237110","wikidata":"https://www.wikidata.org/wiki/Q114901","display_name":"Gate array","level":3,"score":0.4753182530403137},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.43213313817977905},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3836643099784851},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3302130103111267},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.32665979862213135},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.2268819808959961},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.21474754810333252},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.20111745595932007},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.08727702498435974}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/cadcg.2009.5246838","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cadcg.2009.5246838","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 11th IEEE International Conference on Computer-Aided Design and Computer Graphics","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.934.7172","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.934.7172","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.ccf.org.cn/resources/1190201776262/2011/06/30/P10198107.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W1523051745","https://openalex.org/W1597088765","https://openalex.org/W1748133846","https://openalex.org/W1971121833","https://openalex.org/W2126255765","https://openalex.org/W2130574428","https://openalex.org/W2139637699","https://openalex.org/W2157173224","https://openalex.org/W2166747627","https://openalex.org/W2263452264","https://openalex.org/W4244417290"],"related_works":["https://openalex.org/W2014165129","https://openalex.org/W2367348190","https://openalex.org/W594316872","https://openalex.org/W2831860248","https://openalex.org/W2367794224","https://openalex.org/W2072850836","https://openalex.org/W2017163657","https://openalex.org/W1968650434","https://openalex.org/W2105610663","https://openalex.org/W1996607072"],"abstract_inverted_index":{"Field":[0],"programmable":[1],"gate":[2],"arrays":[3],"(FPGAs)":[4],"are":[5],"becoming":[6],"increasingly":[7],"important":[8],"implementation":[9],"platforms":[10],"for":[11,19],"digital":[12],"circuits.":[13],"This":[14],"paper":[15],"presents":[16],"a":[17,39],"method":[18],"symmetrical":[20],"FPGA":[21,53],"placement":[22],"based":[23],"on":[24],"ant":[25],"colony":[26],"optimization":[27],"(ACO).":[28],"Also,":[29],"we":[30],"take":[31],"the":[32,51],"routing":[33,67],"congestion":[34,40],"into":[35],"consideration":[36],"by":[37],"introducing":[38],"factor":[41],"in":[42,64],"our":[43],"algorithm.":[44],"Experimental":[45],"results":[46],"show":[47],"that":[48],"compared":[49],"with":[50],"state-of-the-art":[52],"place":[54],"and":[55],"route":[56],"tool":[57],"VPR,":[58],"ACO":[59],"algorithm":[60],"achieves":[61],"promising":[62],"performance,":[63],"terms":[65],"of":[66],"channel":[68],"density.":[69]},"counts_by_year":[{"year":2020,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2015,"cited_by_count":2},{"year":2014,"cited_by_count":3},{"year":2013,"cited_by_count":2}],"updated_date":"2026-04-05T17:49:38.594831","created_date":"2025-10-10T00:00:00"}