{"id":"https://openalex.org/W3094221365","doi":"https://doi.org/10.1109/cacre50138.2020.9229936","title":"Design of real-time enhanced monitoring terminal based on FPGA","display_name":"Design of real-time enhanced monitoring terminal based on FPGA","publication_year":2020,"publication_date":"2020-09-01","ids":{"openalex":"https://openalex.org/W3094221365","doi":"https://doi.org/10.1109/cacre50138.2020.9229936","mag":"3094221365"},"language":"en","primary_location":{"id":"doi:10.1109/cacre50138.2020.9229936","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cacre50138.2020.9229936","pdf_url":null,"source":{"id":"https://openalex.org/S4306498616","display_name":"2020 5th International Conference on Automation, Control and Robotics Engineering (CACRE)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 5th International Conference on Automation, Control and Robotics Engineering (CACRE)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5085866814","display_name":"Fengyan ni","orcid":null},"institutions":[{"id":"https://openalex.org/I110440473","display_name":"Xi'an University of Science and Technology","ror":"https://ror.org/046fkpt18","country_code":"CN","type":"education","lineage":["https://openalex.org/I110440473"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Fengyan ni","raw_affiliation_strings":["College of Electrical and Control Engineering, Xi\u2019an University of Science And Technology, Xi\u2019an, China","College of Electrical and Control Engineering, Xi'an University of Science And Technology, Xi'an, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"College of Electrical and Control Engineering, Xi\u2019an University of Science And Technology, Xi\u2019an, China","institution_ids":["https://openalex.org/I110440473"]},{"raw_affiliation_string":"College of Electrical and Control Engineering, Xi'an University of Science And Technology, Xi'an, China","institution_ids":["https://openalex.org/I110440473"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5070236658","display_name":"Ningzhuang Liu","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Ningzhuang liu","raw_affiliation_strings":["College of Electrical and Control Engineering, Xi\u2019an, China","College of Electrical and Control Engineering, Xi'an, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"College of Electrical and Control Engineering, Xi\u2019an, China","institution_ids":[]},{"raw_affiliation_string":"College of Electrical and Control Engineering, Xi'an, China","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.12652741,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"40","issue":null,"first_page":"575","last_page":"580"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11019","display_name":"Image Enhancement Techniques","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11019","display_name":"Image Enhancement Techniques","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12941","display_name":"Embedded Systems and FPGA Design","score":0.9904999732971191,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10531","display_name":"Advanced Vision and Imaging","score":0.9876000285148621,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7404932975769043},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7403918504714966},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6289788484573364},{"id":"https://openalex.org/keywords/image-processing","display_name":"Image processing","score":0.5900672674179077},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.5483643412590027},{"id":"https://openalex.org/keywords/verilog","display_name":"Verilog","score":0.5453817248344421},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.48538219928741455},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.46133315563201904},{"id":"https://openalex.org/keywords/digital-image-processing","display_name":"Digital image processing","score":0.42990145087242126},{"id":"https://openalex.org/keywords/video-processing","display_name":"Video processing","score":0.4290139675140381},{"id":"https://openalex.org/keywords/real-time-computing","display_name":"Real-time computing","score":0.34751421213150024},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.24677470326423645},{"id":"https://openalex.org/keywords/image","display_name":"Image (mathematics)","score":0.14985913038253784}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7404932975769043},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7403918504714966},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6289788484573364},{"id":"https://openalex.org/C9417928","wikidata":"https://www.wikidata.org/wiki/Q1070689","display_name":"Image processing","level":3,"score":0.5900672674179077},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.5483643412590027},{"id":"https://openalex.org/C2779030575","wikidata":"https://www.wikidata.org/wiki/Q827773","display_name":"Verilog","level":3,"score":0.5453817248344421},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.48538219928741455},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.46133315563201904},{"id":"https://openalex.org/C104317675","wikidata":"https://www.wikidata.org/wiki/Q1070689","display_name":"Digital image processing","level":4,"score":0.42990145087242126},{"id":"https://openalex.org/C65483669","wikidata":"https://www.wikidata.org/wiki/Q3536669","display_name":"Video processing","level":2,"score":0.4290139675140381},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.34751421213150024},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.24677470326423645},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.14985913038253784},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/cacre50138.2020.9229936","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cacre50138.2020.9229936","pdf_url":null,"source":{"id":"https://openalex.org/S4306498616","display_name":"2020 5th International Conference on Automation, Control and Robotics Engineering (CACRE)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 5th International Conference on Automation, Control and Robotics Engineering (CACRE)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":1,"referenced_works":["https://openalex.org/W2099641618"],"related_works":["https://openalex.org/W2387264083","https://openalex.org/W1876592433","https://openalex.org/W2083269738","https://openalex.org/W2604877941","https://openalex.org/W2390885485","https://openalex.org/W2386230482","https://openalex.org/W2371310357","https://openalex.org/W2373039468","https://openalex.org/W2356859146","https://openalex.org/W2351225324"],"abstract_inverted_index":{"In":[0],"the":[1,12,18,20,36,44,48,51,57,60,79,99,115,135,152,157,162,177,180,183,190,226,232,240],"power":[2],"system,":[3,98,181],"when":[4,82],"monitoring":[5,33,128,153],"various":[6],"devices":[7],"and":[8,24,34,46,72,91,117,140,147,168,195],"transmission":[9,13,163],"lines,":[10],"because":[11],"lines":[14],"are":[15,27,212],"generally":[16],"in":[17,59,151,239,244],"wild,":[19],"surrounding":[21],"weather":[22,45],"environment":[23,26],"geographical":[25],"very":[28],"complicated.":[29],"Therefore,":[30],"during":[31,165],"video":[32,38],"recognition,":[35],"collected":[37,52],"images":[39,53],"will":[40],"be":[41],"Affected":[42],"by":[43],"light,":[47],"quality":[49],"of":[50,137,179],"is":[54,74,101,107,235],"reduced.":[55],"However,":[56],"recognition":[58,90],"later":[61],"stage":[62],"does":[63],"not":[64],"consider":[65],"how":[66],"to":[67,77,109,113,155,159,197,202,237,247],"filter":[68],"out":[69],"these":[70,219],"influences,":[71],"it":[73,106],"often":[75],"difficult":[76,108,236],"achieve":[78,169],"desired":[80],"results":[81],"performing":[83],"subsequent":[84,166],"image":[85,96,145,184,199,220,228],"processing":[86,97,167,221,229],"such":[87],"as":[88,176,189,207],"target":[89],"tracking.":[92],"For":[93],"ARM+FPGA,":[94],"DSP+FPGA":[95],"cost":[100],"high,":[102],"Low":[103],"resource":[104],"utilization,":[105],"use":[110,187,203,242],"simple":[111],"FPGA":[112,132,174],"control":[114,191],"process":[116],"complex":[118],"branch":[119],"judgment,":[120],"therefore,":[121],"this":[122],"paper":[123],"designs":[124],"a":[125],"real-time":[126,148],"enhanced":[127,149],"terminal":[129,154],"based":[130,133],"on":[131,134],"idea":[136],"FPGA-based":[138],"hardware":[139,196,204,216],"software":[141,194],"collaborative":[142],"processing.":[143],"Complete":[144],"acquisition":[146],"preprocessing":[150],"improve":[156],"ability":[158],"accurately":[160],"identify":[161],"line":[164],"accurate":[170],"identification.":[171],"Use":[172],"an":[173],"chip":[175],"core":[178],"cache":[182],"through":[185,223],"SDRAM,":[186],"Sopc":[188,245],"core,":[192],"coordinate":[193],"perform":[198],"processing,":[200],"easy":[201],"implementation":[205],"(such":[206],"filtering,":[208],"edge":[209],"detection,":[210],"etc.)":[211],"implemented":[213],"using":[214],"Verilog":[215],"language,":[217],"Control":[218],"modules":[222],"Sopc,":[224],"realize":[225,238],"corresponding":[227],"function.":[230],"And":[231],"part":[233],"that":[234],"hardware,":[241],"NiosII":[243],"system":[246],"realize.":[248]},"counts_by_year":[],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}