{"id":"https://openalex.org/W2536365808","doi":"https://doi.org/10.1109/bmas.2010.6156602","title":"Fast dynamic simulation of VLSI circuits using reduced order compact macromodel of standard cells","display_name":"Fast dynamic simulation of VLSI circuits using reduced order compact macromodel of standard cells","publication_year":2010,"publication_date":"2010-09-01","ids":{"openalex":"https://openalex.org/W2536365808","doi":"https://doi.org/10.1109/bmas.2010.6156602","mag":"2536365808"},"language":"en","primary_location":{"id":"doi:10.1109/bmas.2010.6156602","is_oa":false,"landing_page_url":"https://doi.org/10.1109/bmas.2010.6156602","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 IEEE International Behavioral Modeling and Simulation Workshop","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5111637630","display_name":"Shivam Priyadarshi","orcid":null},"institutions":[{"id":"https://openalex.org/I137902535","display_name":"North Carolina State University","ror":"https://ror.org/04tj63d06","country_code":"US","type":"education","lineage":["https://openalex.org/I137902535"]},{"id":"https://openalex.org/I2801313472","display_name":"North Central State College","ror":"https://ror.org/04b6b6f76","country_code":"US","type":"education","lineage":["https://openalex.org/I2801313472"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Shivam Priyadarshi","raw_affiliation_strings":["NC State UniverSity, Raleigh, NC, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"NC State UniverSity, Raleigh, NC, USA","institution_ids":["https://openalex.org/I137902535","https://openalex.org/I2801313472"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5063701885","display_name":"Nikhil M. Kriplani","orcid":null},"institutions":[{"id":"https://openalex.org/I137902535","display_name":"North Carolina State University","ror":"https://ror.org/04tj63d06","country_code":"US","type":"education","lineage":["https://openalex.org/I137902535"]},{"id":"https://openalex.org/I2801313472","display_name":"North Central State College","ror":"https://ror.org/04b6b6f76","country_code":"US","type":"education","lineage":["https://openalex.org/I2801313472"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Nikhil Kriplani","raw_affiliation_strings":["NC State UniverSity, Raleigh, NC, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"NC State UniverSity, Raleigh, NC, USA","institution_ids":["https://openalex.org/I137902535","https://openalex.org/I2801313472"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5044356067","display_name":"M.B. Steer","orcid":"https://orcid.org/0000-0003-0786-033X"},"institutions":[{"id":"https://openalex.org/I137902535","display_name":"North Carolina State University","ror":"https://ror.org/04tj63d06","country_code":"US","type":"education","lineage":["https://openalex.org/I137902535"]},{"id":"https://openalex.org/I2801313472","display_name":"North Central State College","ror":"https://ror.org/04b6b6f76","country_code":"US","type":"education","lineage":["https://openalex.org/I2801313472"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Michael B. Steer","raw_affiliation_strings":["NC State UniverSity, Raleigh, NC, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"NC State UniverSity, Raleigh, NC, USA","institution_ids":["https://openalex.org/I137902535","https://openalex.org/I2801313472"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5111673885","display_name":"T. Robert Harris","orcid":null},"institutions":[{"id":"https://openalex.org/I137902535","display_name":"North Carolina State University","ror":"https://ror.org/04tj63d06","country_code":"US","type":"education","lineage":["https://openalex.org/I137902535"]},{"id":"https://openalex.org/I2801313472","display_name":"North Central State College","ror":"https://ror.org/04b6b6f76","country_code":"US","type":"education","lineage":["https://openalex.org/I2801313472"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"T. Robert Harris","raw_affiliation_strings":["NC State UniverSity, Raleigh, NC, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"NC State UniverSity, Raleigh, NC, USA","institution_ids":["https://openalex.org/I137902535","https://openalex.org/I2801313472"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.34217144,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"39","issue":null,"first_page":"75","last_page":"80"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.7329438328742981},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.7272409200668335},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.6774919033050537},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6261909008026123},{"id":"https://openalex.org/keywords/transistor-count","display_name":"Transistor count","score":0.5293555855751038},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.48833271861076355},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4840325713157654},{"id":"https://openalex.org/keywords/model-order-reduction","display_name":"Model order reduction","score":0.4362199902534485},{"id":"https://openalex.org/keywords/state","display_name":"State (computer science)","score":0.4296950697898865},{"id":"https://openalex.org/keywords/state-variable","display_name":"State variable","score":0.41688475012779236},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3361537456512451},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.27872782945632935},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.2223566174507141},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.1797333061695099},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.1669977903366089},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.15070050954818726},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.09255632758140564},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.06487694382667542}],"concepts":[{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.7329438328742981},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.7272409200668335},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.6774919033050537},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6261909008026123},{"id":"https://openalex.org/C196320899","wikidata":"https://www.wikidata.org/wiki/Q2623746","display_name":"Transistor count","level":4,"score":0.5293555855751038},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.48833271861076355},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4840325713157654},{"id":"https://openalex.org/C2779277453","wikidata":"https://www.wikidata.org/wiki/Q12202921","display_name":"Model order reduction","level":3,"score":0.4362199902534485},{"id":"https://openalex.org/C48103436","wikidata":"https://www.wikidata.org/wiki/Q599031","display_name":"State (computer science)","level":2,"score":0.4296950697898865},{"id":"https://openalex.org/C129537906","wikidata":"https://www.wikidata.org/wiki/Q7603913","display_name":"State variable","level":2,"score":0.41688475012779236},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3361537456512451},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.27872782945632935},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.2223566174507141},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.1797333061695099},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.1669977903366089},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.15070050954818726},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.09255632758140564},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.06487694382667542},{"id":"https://openalex.org/C97355855","wikidata":"https://www.wikidata.org/wiki/Q11473","display_name":"Thermodynamics","level":1,"score":0.0},{"id":"https://openalex.org/C57493831","wikidata":"https://www.wikidata.org/wiki/Q3134666","display_name":"Projection (relational algebra)","level":2,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/bmas.2010.6156602","is_oa":false,"landing_page_url":"https://doi.org/10.1109/bmas.2010.6156602","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 IEEE International Behavioral Modeling and Simulation Workshop","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.7099999785423279}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":44,"referenced_works":["https://openalex.org/W106724032","https://openalex.org/W1539888992","https://openalex.org/W1543199696","https://openalex.org/W1600001369","https://openalex.org/W1619529175","https://openalex.org/W1892111635","https://openalex.org/W1922936492","https://openalex.org/W1964073704","https://openalex.org/W1979668030","https://openalex.org/W1979937591","https://openalex.org/W1991630560","https://openalex.org/W2071471806","https://openalex.org/W2079267582","https://openalex.org/W2097006642","https://openalex.org/W2098270069","https://openalex.org/W2101995003","https://openalex.org/W2112918184","https://openalex.org/W2115762432","https://openalex.org/W2116880695","https://openalex.org/W2120860555","https://openalex.org/W2127894564","https://openalex.org/W2133692466","https://openalex.org/W2135254996","https://openalex.org/W2135577965","https://openalex.org/W2142202849","https://openalex.org/W2147732182","https://openalex.org/W2148602057","https://openalex.org/W2157080063","https://openalex.org/W2160212127","https://openalex.org/W2164843628","https://openalex.org/W2168970381","https://openalex.org/W2169028264","https://openalex.org/W2171558685","https://openalex.org/W2276815106","https://openalex.org/W2535275512","https://openalex.org/W2539308848","https://openalex.org/W4229802981","https://openalex.org/W4231164902","https://openalex.org/W4235799760","https://openalex.org/W6604273139","https://openalex.org/W6635946889","https://openalex.org/W6636765528","https://openalex.org/W6677341922","https://openalex.org/W6683155022"],"related_works":["https://openalex.org/W4283025278","https://openalex.org/W61292821","https://openalex.org/W2082432309","https://openalex.org/W817174743","https://openalex.org/W2050492524","https://openalex.org/W2998315020","https://openalex.org/W2104790384","https://openalex.org/W1976665945","https://openalex.org/W2137494283","https://openalex.org/W1583771840"],"abstract_inverted_index":{"This":[0,35],"paper":[1],"presents":[2],"a":[3,8,23],"dynamic":[4,87],"simulation":[5,42,64,79,88],"methodology":[6],"using":[7,65],"reduced":[9],"order":[10],"compact":[11],"macromodel":[12],"of":[13,26],"standard":[14,17],"cells.":[15],"The":[16,56],"cell":[18],"macromodels":[19,57],"are":[20,58,96],"formulated":[21],"with":[22,77],"smaller":[24],"number":[25],"state":[27,50],"variables":[28,51],"compared":[29],"to":[30],"an":[31],"equivalent":[32],"transistor-level":[33,41,78],"implementation.":[34],"results":[36,69],"in":[37,49,70,86,93],"significant":[38],"speed-ups":[39],"over":[40],"for":[43],"large":[44],"scale":[45],"circuits.":[46],"Such":[47],"reduction":[48,85,92],"also":[52],"reduces":[53],"memory":[54,94],"usage.":[55],"based":[59],"on":[60],"transistor":[61],"equations,":[62],"and":[63,90],"these":[66],"models":[67],"produces":[68],"excellent":[71],"agreement":[72],"(delay":[73],"errors":[74],"below":[75],"1%)":[76],"results.":[80],"Various":[81],"examples":[82],"showing":[83],"1.5x-100x":[84],"time":[89],"1.5x-2.8x":[91],"usage":[95],"presented.":[97]},"counts_by_year":[],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}