{"id":"https://openalex.org/W2138751967","doi":"https://doi.org/10.1109/bmas.2009.5338876","title":"The PRAISE approach for accelerated transient analysis applied to wire models","display_name":"The PRAISE approach for accelerated transient analysis applied to wire models","publication_year":2009,"publication_date":"2009-09-01","ids":{"openalex":"https://openalex.org/W2138751967","doi":"https://doi.org/10.1109/bmas.2009.5338876","mag":"2138751967"},"language":"en","primary_location":{"id":"doi:10.1109/bmas.2009.5338876","is_oa":false,"landing_page_url":"https://doi.org/10.1109/bmas.2009.5338876","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 IEEE Behavioral Modeling and Simulation Workshop","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5035053202","display_name":"D. Zaum","orcid":null},"institutions":[{"id":"https://openalex.org/I114112103","display_name":"Leibniz University Hannover","ror":"https://ror.org/0304hq317","country_code":"DE","type":"education","lineage":["https://openalex.org/I114112103"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"Daniel Zaum","raw_affiliation_strings":["Institute of Microelectronic Systems, Leibniz Universit\u00e4t Hannover, Germany","Institute of Microelectronic Systems Leibniz Universit\u00e4t Hannover, Germany"],"affiliations":[{"raw_affiliation_string":"Institute of Microelectronic Systems, Leibniz Universit\u00e4t Hannover, Germany","institution_ids":["https://openalex.org/I114112103"]},{"raw_affiliation_string":"Institute of Microelectronic Systems Leibniz Universit\u00e4t Hannover, Germany","institution_ids":["https://openalex.org/I114112103"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5059017281","display_name":"S. Hoelldampf","orcid":null},"institutions":[{"id":"https://openalex.org/I114112103","display_name":"Leibniz University Hannover","ror":"https://ror.org/0304hq317","country_code":"DE","type":"education","lineage":["https://openalex.org/I114112103"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Stefan Hoelldampf","raw_affiliation_strings":["Institute of Microelectronic Systems, Leibniz Universit\u00e4t Hannover, Germany","Institute of Microelectronic Systems Leibniz Universit\u00e4t Hannover, Germany"],"affiliations":[{"raw_affiliation_string":"Institute of Microelectronic Systems, Leibniz Universit\u00e4t Hannover, Germany","institution_ids":["https://openalex.org/I114112103"]},{"raw_affiliation_string":"Institute of Microelectronic Systems Leibniz Universit\u00e4t Hannover, Germany","institution_ids":["https://openalex.org/I114112103"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5010238994","display_name":"Markus Olbrich","orcid":"https://orcid.org/0000-0001-9851-5982"},"institutions":[{"id":"https://openalex.org/I114112103","display_name":"Leibniz University Hannover","ror":"https://ror.org/0304hq317","country_code":"DE","type":"education","lineage":["https://openalex.org/I114112103"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Markus Olbrich","raw_affiliation_strings":["Institute of Microelectronic Systems, Leibniz Universit\u00e4t Hannover, Germany","Institute of Microelectronic Systems Leibniz Universit\u00e4t Hannover, Germany"],"affiliations":[{"raw_affiliation_string":"Institute of Microelectronic Systems, Leibniz Universit\u00e4t Hannover, Germany","institution_ids":["https://openalex.org/I114112103"]},{"raw_affiliation_string":"Institute of Microelectronic Systems Leibniz Universit\u00e4t Hannover, Germany","institution_ids":["https://openalex.org/I114112103"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5057367287","display_name":"Erich Barke","orcid":"https://orcid.org/0000-0001-5744-2940"},"institutions":[{"id":"https://openalex.org/I114112103","display_name":"Leibniz University Hannover","ror":"https://ror.org/0304hq317","country_code":"DE","type":"education","lineage":["https://openalex.org/I114112103"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Erich Barke","raw_affiliation_strings":["Institute of Microelectronic Systems, Leibniz Universit\u00e4t Hannover, Germany","Institute of Microelectronic Systems Leibniz Universit\u00e4t Hannover, Germany"],"affiliations":[{"raw_affiliation_string":"Institute of Microelectronic Systems, Leibniz Universit\u00e4t Hannover, Germany","institution_ids":["https://openalex.org/I114112103"]},{"raw_affiliation_string":"Institute of Microelectronic Systems Leibniz Universit\u00e4t Hannover, Germany","institution_ids":["https://openalex.org/I114112103"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5087480909","display_name":"I. Neumann","orcid":null},"institutions":[{"id":"https://openalex.org/I147869694","display_name":"Continental (Germany)","ror":"https://ror.org/0359s0245","country_code":"DE","type":"company","lineage":["https://openalex.org/I147869694"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Ingmar Neumann","raw_affiliation_strings":["Division Chassis & Safety, Continental Corporation, Frankfurt, Germany","Continental Corporation, Division Chassis & Safety, Frankfurt a.M., Germany"],"affiliations":[{"raw_affiliation_string":"Division Chassis & Safety, Continental Corporation, Frankfurt, Germany","institution_ids":["https://openalex.org/I147869694"]},{"raw_affiliation_string":"Continental Corporation, Division Chassis & Safety, Frankfurt a.M., Germany","institution_ids":["https://openalex.org/I147869694"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5049923191","display_name":"Sebastian Schmidt","orcid":"https://orcid.org/0009-0006-6700-0437"},"institutions":[{"id":"https://openalex.org/I147869694","display_name":"Continental (Germany)","ror":"https://ror.org/0359s0245","country_code":"DE","type":"company","lineage":["https://openalex.org/I147869694"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Sebastian Schmidt","raw_affiliation_strings":["Division Chassis & Safety, Continental Corporation, Frankfurt, Germany","Continental Corporation, Division Chassis & Safety, Frankfurt a.M., Germany"],"affiliations":[{"raw_affiliation_string":"Division Chassis & Safety, Continental Corporation, Frankfurt, Germany","institution_ids":["https://openalex.org/I147869694"]},{"raw_affiliation_string":"Continental Corporation, Division Chassis & Safety, Frankfurt a.M., Germany","institution_ids":["https://openalex.org/I147869694"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5035053202"],"corresponding_institution_ids":["https://openalex.org/I114112103"],"apc_list":null,"apc_paid":null,"fwci":0.2991,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.6483634,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":98},"biblio":{"volume":"138","issue":null,"first_page":"120","last_page":"125"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7462728023529053},{"id":"https://openalex.org/keywords/interfacing","display_name":"Interfacing","score":0.6388042569160461},{"id":"https://openalex.org/keywords/transient","display_name":"Transient (computer programming)","score":0.49956226348876953},{"id":"https://openalex.org/keywords/key","display_name":"Key (lock)","score":0.4682878851890564},{"id":"https://openalex.org/keywords/realization","display_name":"Realization (probability)","score":0.44388455152511597},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.4278588891029358},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.4235360324382782},{"id":"https://openalex.org/keywords/mixed-signal-integrated-circuit","display_name":"Mixed-signal integrated circuit","score":0.4203779101371765},{"id":"https://openalex.org/keywords/kernel","display_name":"Kernel (algebra)","score":0.417577862739563},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3601856827735901},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.34763771295547485},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.1902068555355072},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.10796457529067993}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7462728023529053},{"id":"https://openalex.org/C2776303644","wikidata":"https://www.wikidata.org/wiki/Q1020499","display_name":"Interfacing","level":2,"score":0.6388042569160461},{"id":"https://openalex.org/C2780799671","wikidata":"https://www.wikidata.org/wiki/Q17087362","display_name":"Transient (computer programming)","level":2,"score":0.49956226348876953},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.4682878851890564},{"id":"https://openalex.org/C2781089630","wikidata":"https://www.wikidata.org/wiki/Q21856745","display_name":"Realization (probability)","level":2,"score":0.44388455152511597},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.4278588891029358},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.4235360324382782},{"id":"https://openalex.org/C62907940","wikidata":"https://www.wikidata.org/wiki/Q1541329","display_name":"Mixed-signal integrated circuit","level":3,"score":0.4203779101371765},{"id":"https://openalex.org/C74193536","wikidata":"https://www.wikidata.org/wiki/Q574844","display_name":"Kernel (algebra)","level":2,"score":0.417577862739563},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3601856827735901},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.34763771295547485},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.1902068555355072},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.10796457529067993},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/bmas.2009.5338876","is_oa":false,"landing_page_url":"https://doi.org/10.1109/bmas.2009.5338876","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 IEEE Behavioral Modeling and Simulation Workshop","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9","score":0.6399999856948853}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W1480928214","https://openalex.org/W1528951670","https://openalex.org/W2033403114","https://openalex.org/W2071738775","https://openalex.org/W2104451384","https://openalex.org/W2105799861","https://openalex.org/W2110368314","https://openalex.org/W2112264678","https://openalex.org/W2114362115","https://openalex.org/W2139030761","https://openalex.org/W2141776905","https://openalex.org/W4229666556","https://openalex.org/W4249744196"],"related_works":["https://openalex.org/W2031235560","https://openalex.org/W2161335888","https://openalex.org/W2114773158","https://openalex.org/W2548106609","https://openalex.org/W1852277090","https://openalex.org/W1957521530","https://openalex.org/W2266281062","https://openalex.org/W67308010","https://openalex.org/W4318953393","https://openalex.org/W4391382578"],"abstract_inverted_index":{"Continuously":[0],"shrinking":[1],"design":[2,28],"sizes":[3],"and":[4,9,30,83,97,100],"the":[5,33,51,67,74,92],"integration":[6],"of":[7,35,53,77,103],"digital":[8],"analog":[10,78],"blocks":[11],"in":[12,20],"a":[13,46,62],"single":[14],"IC":[15],"are":[16,55],"clearly":[17],"identifiable":[18],"trends":[19,26],"today's":[21],"microelectronics":[22],"industry.":[23],"As":[24,45],"both":[25],"increase":[27],"complexity":[29],"concurrently":[31],"make":[32],"outcome":[34],"manufacturing":[36,40],"processes":[37],"less":[38],"predictable,":[39],"yield":[41],"is":[42],"potentially":[43],"endangered.":[44],"countermeasure,":[47],"new":[48,63],"methodologies":[49],"for":[50,66],"simulation":[52,64,76,118],"mixed-signal-circuits":[54],"required.":[56],"In":[57],"this":[58],"paper,":[59],"we":[60,107],"describe":[61],"kernel":[65],"previously":[68],"presented":[69],"PRAISE":[70,115],"methodology.":[71],"It":[72],"accelerates":[73],"transient":[75],"mixed-signal":[79],"systems":[80],"by":[81],"generating":[82],"employing":[84],"abstract":[85],"circuit":[86],"models":[87,96],"during":[88],"runtime.":[89],"We":[90],"apply":[91],"methodology":[93],"to":[94],"wire":[95],"discuss":[98],"results":[99],"runtime":[101],"behavior":[102],"different":[104],"implementations.":[105],"Furthermore,":[106],"present":[108],"an":[109],"automated":[110],"XML-based":[111],"approach":[112],"at":[113],"interfacing":[114],"with":[116],"arbitrary":[117],"environments":[119],"using":[120],"SystemC.":[121]},"counts_by_year":[{"year":2019,"cited_by_count":4},{"year":2017,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
