{"id":"https://openalex.org/W2534302980","doi":"https://doi.org/10.1109/bmas.2008.4751245","title":"Co-Simulation of mixed HW/SW and Analog/RF systems at architectural level","display_name":"Co-Simulation of mixed HW/SW and Analog/RF systems at architectural level","publication_year":2008,"publication_date":"2008-09-01","ids":{"openalex":"https://openalex.org/W2534302980","doi":"https://doi.org/10.1109/bmas.2008.4751245","mag":"2534302980"},"language":"en","primary_location":{"id":"doi:10.1109/bmas.2008.4751245","is_oa":false,"landing_page_url":"https://doi.org/10.1109/bmas.2008.4751245","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 IEEE International Behavioral Modeling and Simulation Workshop","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5046127222","display_name":"Markus Damm","orcid":null},"institutions":[{"id":"https://openalex.org/I145847075","display_name":"TU Wien","ror":"https://ror.org/04d836q62","country_code":"AT","type":"education","lineage":["https://openalex.org/I145847075"]}],"countries":["AT"],"is_corresponding":true,"raw_author_name":"Markus Damm","raw_affiliation_strings":["Institute of Computer Technology, University of Technology, Vienna, Austria"],"affiliations":[{"raw_affiliation_string":"Institute of Computer Technology, University of Technology, Vienna, Austria","institution_ids":["https://openalex.org/I145847075"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5084589828","display_name":"Jan Haase","orcid":"https://orcid.org/0000-0003-3021-9217"},"institutions":[{"id":"https://openalex.org/I145847075","display_name":"TU Wien","ror":"https://ror.org/04d836q62","country_code":"AT","type":"education","lineage":["https://openalex.org/I145847075"]}],"countries":["AT"],"is_corresponding":false,"raw_author_name":"Jan Haase","raw_affiliation_strings":["Institute of Computer Technology, University of Technology, Vienna, Austria"],"affiliations":[{"raw_affiliation_string":"Institute of Computer Technology, University of Technology, Vienna, Austria","institution_ids":["https://openalex.org/I145847075"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5103027575","display_name":"Christoph Grimm","orcid":"https://orcid.org/0000-0002-5930-7563"},"institutions":[{"id":"https://openalex.org/I145847075","display_name":"TU Wien","ror":"https://ror.org/04d836q62","country_code":"AT","type":"education","lineage":["https://openalex.org/I145847075"]}],"countries":["AT"],"is_corresponding":false,"raw_author_name":"Christoph Grimm","raw_affiliation_strings":["Institute of Computer Technology, University of Technology, Vienna, Austria"],"affiliations":[{"raw_affiliation_string":"Institute of Computer Technology, University of Technology, Vienna, Austria","institution_ids":["https://openalex.org/I145847075"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5046127222"],"corresponding_institution_ids":["https://openalex.org/I145847075"],"apc_list":null,"apc_paid":null,"fwci":0.3466,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.7275631,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"84","last_page":"89"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.998199999332428,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9977999925613403,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/systemc","display_name":"SystemC","score":0.9784377813339233},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.779428243637085},{"id":"https://openalex.org/keywords/speedup","display_name":"Speedup","score":0.7039307951927185},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.6126483082771301},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.5750225186347961},{"id":"https://openalex.org/keywords/computation","display_name":"Computation","score":0.544653594493866},{"id":"https://openalex.org/keywords/electronic-system-level-design-and-verification","display_name":"Electronic system-level design and verification","score":0.5357578992843628},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5176358819007874},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.456473171710968},{"id":"https://openalex.org/keywords/embedded-software","display_name":"Embedded software","score":0.43082237243652344},{"id":"https://openalex.org/keywords/model-of-computation","display_name":"Model of computation","score":0.41102153062820435},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.32469841837882996},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.12138953804969788},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.11119556427001953}],"concepts":[{"id":"https://openalex.org/C2776928060","wikidata":"https://www.wikidata.org/wiki/Q1753563","display_name":"SystemC","level":2,"score":0.9784377813339233},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.779428243637085},{"id":"https://openalex.org/C68339613","wikidata":"https://www.wikidata.org/wiki/Q1549489","display_name":"Speedup","level":2,"score":0.7039307951927185},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.6126483082771301},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.5750225186347961},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.544653594493866},{"id":"https://openalex.org/C77495112","wikidata":"https://www.wikidata.org/wiki/Q5358436","display_name":"Electronic system-level design and verification","level":2,"score":0.5357578992843628},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5176358819007874},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.456473171710968},{"id":"https://openalex.org/C154488198","wikidata":"https://www.wikidata.org/wiki/Q1335007","display_name":"Embedded software","level":3,"score":0.43082237243652344},{"id":"https://openalex.org/C184596265","wikidata":"https://www.wikidata.org/wiki/Q2651576","display_name":"Model of computation","level":3,"score":0.41102153062820435},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.32469841837882996},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.12138953804969788},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.11119556427001953}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/bmas.2008.4751245","is_oa":false,"landing_page_url":"https://doi.org/10.1109/bmas.2008.4751245","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 IEEE International Behavioral Modeling and Simulation Workshop","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W2120431055","https://openalex.org/W2125436261","https://openalex.org/W2157561706","https://openalex.org/W2169180789","https://openalex.org/W2596251190","https://openalex.org/W2976169860","https://openalex.org/W4285719527","https://openalex.org/W6734747965"],"related_works":["https://openalex.org/W2119788505","https://openalex.org/W2132074508","https://openalex.org/W2059569687","https://openalex.org/W1576344679","https://openalex.org/W4256613086","https://openalex.org/W1998879896","https://openalex.org/W2102117846","https://openalex.org/W2543714346","https://openalex.org/W2116103175","https://openalex.org/W2362654847"],"abstract_inverted_index":{"Analog":[0],"systems":[1],"are":[2,31],"more":[3,5],"and":[4,27],"functionally":[6],"interwoven":[7],"with":[8,71],"digital":[9],"hardware/software":[10,40],"systems.":[11,41],"SystemC":[12,24,28,68],"offers":[13],"the":[14,33,77],"potential":[15],"for":[16,21,80],"a":[17,64],"unified":[18],"modeling":[19],"approach":[20],"such":[22],"systems:":[23],"AMS":[25,69],"extensions":[26,30,43,70,74],"TLM":[29,72],"covering":[32],"domains":[34],"of":[35,47],"analog/signal":[36],"processing":[37],"systems,":[38],"resp.":[39],"Both":[42],"use":[44],"different":[45],"Models":[46],"Computation":[48],"to":[49,66],"gain":[50],"simulation":[51,78],"performance,":[52],"most":[53],"notably":[54],"by":[55],"abstracting":[56],"timing":[57],"information.":[58],"In":[59],"this":[60],"paper":[61],"we":[62],"present":[63],"method":[65],"couple":[67],"2.0":[73],"while":[75],"maintaining":[76],"speedup":[79],"an":[81],"overall":[82],"system":[83],"simulation.":[84]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}