{"id":"https://openalex.org/W2581868955","doi":"https://doi.org/10.1109/biocas.2016.7833854","title":"Scaling mixed-signal neuromorphic processors to 28 nm FD-SOI technologies","display_name":"Scaling mixed-signal neuromorphic processors to 28 nm FD-SOI technologies","publication_year":2016,"publication_date":"2016-10-01","ids":{"openalex":"https://openalex.org/W2581868955","doi":"https://doi.org/10.1109/biocas.2016.7833854","mag":"2581868955"},"language":"en","primary_location":{"id":"doi:10.1109/biocas.2016.7833854","is_oa":false,"landing_page_url":"https://doi.org/10.1109/biocas.2016.7833854","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 IEEE Biomedical Circuits and Systems Conference (BioCAS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101732845","display_name":"Ning Qiao","orcid":"https://orcid.org/0000-0003-0264-5622"},"institutions":[{"id":"https://openalex.org/I12708293","display_name":"SIB Swiss Institute of Bioinformatics","ror":"https://ror.org/002n09z45","country_code":"CH","type":"nonprofit","lineage":["https://openalex.org/I12708293"]},{"id":"https://openalex.org/I202697423","display_name":"University of Zurich","ror":"https://ror.org/02crff812","country_code":"CH","type":"education","lineage":["https://openalex.org/I202697423"]},{"id":"https://openalex.org/I35440088","display_name":"ETH Zurich","ror":"https://ror.org/05a28rw58","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I35440088"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Ning Qiao","raw_affiliation_strings":["Institute of Neuroinformatics, University of Zurich and ETH Zurich, Zurich, Switzerland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Neuroinformatics, University of Zurich and ETH Zurich, Zurich, Switzerland","institution_ids":["https://openalex.org/I12708293","https://openalex.org/I202697423","https://openalex.org/I35440088"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5060241952","display_name":"Giacomo Indiveri","orcid":"https://orcid.org/0000-0002-7109-1689"},"institutions":[{"id":"https://openalex.org/I12708293","display_name":"SIB Swiss Institute of Bioinformatics","ror":"https://ror.org/002n09z45","country_code":"CH","type":"nonprofit","lineage":["https://openalex.org/I12708293"]},{"id":"https://openalex.org/I202697423","display_name":"University of Zurich","ror":"https://ror.org/02crff812","country_code":"CH","type":"education","lineage":["https://openalex.org/I202697423"]},{"id":"https://openalex.org/I35440088","display_name":"ETH Zurich","ror":"https://ror.org/05a28rw58","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I35440088"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Giacomo Indiveri","raw_affiliation_strings":["Institute of Neuroinformatics, University of Zurich and ETH Zurich, Zurich, Switzerland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Neuroinformatics, University of Zurich and ETH Zurich, Zurich, Switzerland","institution_ids":["https://openalex.org/I12708293","https://openalex.org/I202697423","https://openalex.org/I35440088"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":9.2813,"has_fulltext":false,"cited_by_count":64,"citation_normalized_percentile":{"value":0.99122017,"is_in_top_1_percent":true,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":94,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"552","last_page":"555"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/neuromorphic-engineering","display_name":"Neuromorphic engineering","score":0.967399001121521},{"id":"https://openalex.org/keywords/silicon-on-insulator","display_name":"Silicon on insulator","score":0.8087683916091919},{"id":"https://openalex.org/keywords/asynchronous-communication","display_name":"Asynchronous communication","score":0.7973067760467529},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6673606634140015},{"id":"https://openalex.org/keywords/scaling","display_name":"Scaling","score":0.6110531091690063},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.5244555473327637},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5023829936981201},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.49115726351737976},{"id":"https://openalex.org/keywords/mixed-signal-integrated-circuit","display_name":"Mixed-signal integrated circuit","score":0.46692797541618347},{"id":"https://openalex.org/keywords/monte-carlo-method","display_name":"Monte Carlo method","score":0.4613639712333679},{"id":"https://openalex.org/keywords/digital-electronics","display_name":"Digital electronics","score":0.4572437107563019},{"id":"https://openalex.org/keywords/signal-processing","display_name":"Signal processing","score":0.4211188852787018},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.38745424151420593},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.3006531596183777},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.2515430450439453},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.24957957863807678},{"id":"https://openalex.org/keywords/silicon","display_name":"Silicon","score":0.23032093048095703},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.22885069251060486},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.22814089059829712},{"id":"https://openalex.org/keywords/artificial-neural-network","display_name":"Artificial neural network","score":0.2200244665145874},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.19912844896316528},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.18506261706352234},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.14343759417533875},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.10559296607971191},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.10225102305412292}],"concepts":[{"id":"https://openalex.org/C151927369","wikidata":"https://www.wikidata.org/wiki/Q1981312","display_name":"Neuromorphic engineering","level":3,"score":0.967399001121521},{"id":"https://openalex.org/C53143962","wikidata":"https://www.wikidata.org/wiki/Q1478788","display_name":"Silicon on insulator","level":3,"score":0.8087683916091919},{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.7973067760467529},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6673606634140015},{"id":"https://openalex.org/C99844830","wikidata":"https://www.wikidata.org/wiki/Q102441924","display_name":"Scaling","level":2,"score":0.6110531091690063},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.5244555473327637},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5023829936981201},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.49115726351737976},{"id":"https://openalex.org/C62907940","wikidata":"https://www.wikidata.org/wiki/Q1541329","display_name":"Mixed-signal integrated circuit","level":3,"score":0.46692797541618347},{"id":"https://openalex.org/C19499675","wikidata":"https://www.wikidata.org/wiki/Q232207","display_name":"Monte Carlo method","level":2,"score":0.4613639712333679},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.4572437107563019},{"id":"https://openalex.org/C104267543","wikidata":"https://www.wikidata.org/wiki/Q208163","display_name":"Signal processing","level":3,"score":0.4211188852787018},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.38745424151420593},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.3006531596183777},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.2515430450439453},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.24957957863807678},{"id":"https://openalex.org/C544956773","wikidata":"https://www.wikidata.org/wiki/Q670","display_name":"Silicon","level":2,"score":0.23032093048095703},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.22885069251060486},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.22814089059829712},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.2200244665145874},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.19912844896316528},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.18506261706352234},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.14343759417533875},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.10559296607971191},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.10225102305412292},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/biocas.2016.7833854","is_oa":false,"landing_page_url":"https://doi.org/10.1109/biocas.2016.7833854","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 IEEE Biomedical Circuits and Systems Conference (BioCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.47999998927116394,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W1695065985","https://openalex.org/W1975398991","https://openalex.org/W2018256572","https://openalex.org/W2034602202","https://openalex.org/W2130360162","https://openalex.org/W2138913040","https://openalex.org/W2157926305","https://openalex.org/W2159951683","https://openalex.org/W2292733612","https://openalex.org/W2919115771","https://openalex.org/W3151328790","https://openalex.org/W4243832265","https://openalex.org/W6697048981"],"related_works":["https://openalex.org/W2986579802","https://openalex.org/W3108691306","https://openalex.org/W4389237622","https://openalex.org/W2166309310","https://openalex.org/W1917800633","https://openalex.org/W2357284929","https://openalex.org/W2115378302","https://openalex.org/W1862020018","https://openalex.org/W2145403160","https://openalex.org/W1982382766"],"abstract_inverted_index":{"As":[0],"processes":[1,101],"continue":[2],"to":[3,32,94],"scale":[4],"aggressively,":[5],"the":[6,46,52,68,91,117,135,147],"design":[7,12,41,64],"of":[8,26,48,54,70,77,119,137],"deep":[9],"sub-micron,":[10],"mixed-signal":[11,29],"is":[13],"becoming":[14],"more":[15,17],"and":[16,58,61,74,106,133],"challenging.":[18],"In":[19],"this":[20],"paper":[21],"we":[22,115],"present":[23,67],"an":[24],"analysis":[25],"scaling":[27],"multi-core":[28,103,130],"neuromorphic":[30,78,104,131],"processors":[31],"advanced":[33,49,142],"28":[34,121,148],"nm":[35,122,149],"FD-SOI":[36],"nodes.":[37],"We":[38,66,89],"address":[39],"analog":[40],"issues":[42],"which":[43,84],"arise":[44],"from":[45],"use":[47],"process,":[50],"including":[51],"problem":[53],"large":[55],"leakage":[56],"currents":[57],"device":[59],"mismatch,":[60],"asynchronous":[62,98],"digital":[63],"issues.":[65],"outcome":[69],"Monte":[71],"Carlo":[72],"Analysis":[73],"circuit":[75,111],"simulations":[76],"sub":[79],"threshold":[80],"analog/digital":[81],"neuron":[82],"circuits":[83],"reproduce":[85],"biologically":[86],"plausible":[87],"responses.":[88],"describe":[90,116],"AER":[92],"used":[93],"implement":[95],"PCHB":[96],"based":[97,124],"QDI":[99],"routing":[100],"in":[102,128,146],"architectures":[105],"validate":[107],"their":[108],"operation":[109],"via":[110],"simulation":[112],"results.":[113],"Finally":[114],"implementation":[118],"custom":[120],"CAM":[123],"memory":[125],"resources":[126],"utilized":[127],"these":[129],"processor":[132],"discuss":[134],"possibility":[136],"increasing":[138],"density":[139],"by":[140],"using":[141],"RRAM":[143],"devices":[144],"integrated":[145],"Fully-Depleted":[150],"Silicon":[151],"on":[152],"Insulator":[153],"(FD-SOI)":[154],"process.":[155]},"counts_by_year":[{"year":2025,"cited_by_count":3},{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":9},{"year":2022,"cited_by_count":8},{"year":2021,"cited_by_count":13},{"year":2020,"cited_by_count":6},{"year":2019,"cited_by_count":8},{"year":2018,"cited_by_count":8},{"year":2017,"cited_by_count":7}],"updated_date":"2026-08-15T07:11:24.734988","created_date":"2025-10-10T00:00:00"}
