{"id":"https://openalex.org/W2903036869","doi":"https://doi.org/10.1109/bcicts.2018.8550842","title":"128-GS/s ADC Front-End with Over 60-GHz Input Bandwidth in 22-nm Si/SiGe FDSOI CMOS","display_name":"128-GS/s ADC Front-End with Over 60-GHz Input Bandwidth in 22-nm Si/SiGe FDSOI CMOS","publication_year":2018,"publication_date":"2018-10-01","ids":{"openalex":"https://openalex.org/W2903036869","doi":"https://doi.org/10.1109/bcicts.2018.8550842","mag":"2903036869"},"language":"en","primary_location":{"id":"doi:10.1109/bcicts.2018.8550842","is_oa":false,"landing_page_url":"https://doi.org/10.1109/bcicts.2018.8550842","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5074810352","display_name":"Alireza Zandieh","orcid":"https://orcid.org/0000-0002-2084-0539"},"institutions":[{"id":"https://openalex.org/I185261750","display_name":"University of Toronto","ror":"https://ror.org/03dbr7087","country_code":"CA","type":"education","lineage":["https://openalex.org/I185261750"]}],"countries":["CA"],"is_corresponding":true,"raw_author_name":"Alireza Zandieh","raw_affiliation_strings":["ECE Department, University of Toronto, Toronto, ON, Canada","[ECE Department, University of Toronto, Toronto, ON, CANADA]"],"affiliations":[{"raw_affiliation_string":"ECE Department, University of Toronto, Toronto, ON, Canada","institution_ids":["https://openalex.org/I185261750"]},{"raw_affiliation_string":"[ECE Department, University of Toronto, Toronto, ON, CANADA]","institution_ids":["https://openalex.org/I185261750"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5054882288","display_name":"Naftali Weiss","orcid":null},"institutions":[{"id":"https://openalex.org/I185261750","display_name":"University of Toronto","ror":"https://ror.org/03dbr7087","country_code":"CA","type":"education","lineage":["https://openalex.org/I185261750"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Naftali Weiss","raw_affiliation_strings":["ECE Department, University of Toronto, Toronto, ON, Canada","[ECE Department, University of Toronto, Toronto, ON, CANADA]"],"affiliations":[{"raw_affiliation_string":"ECE Department, University of Toronto, Toronto, ON, Canada","institution_ids":["https://openalex.org/I185261750"]},{"raw_affiliation_string":"[ECE Department, University of Toronto, Toronto, ON, CANADA]","institution_ids":["https://openalex.org/I185261750"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109937364","display_name":"Thelinh Nguyen","orcid":null},"institutions":[{"id":"https://openalex.org/I908609501","display_name":"Finisar (United States)","ror":"https://ror.org/01jqh6j63","country_code":"US","type":"company","lineage":["https://openalex.org/I908609501"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"The'Linh Nguyen","raw_affiliation_strings":["Finisar Corporation, Sunnyvale, CA, United States"],"affiliations":[{"raw_affiliation_string":"Finisar Corporation, Sunnyvale, CA, United States","institution_ids":["https://openalex.org/I908609501"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5009438236","display_name":"David Haranne","orcid":null},"institutions":[{"id":"https://openalex.org/I4210142027","display_name":"GlobalFoundries (Germany)","ror":"https://ror.org/045jad561","country_code":"DE","type":"company","lineage":["https://openalex.org/I35662394","https://openalex.org/I4210142027"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"David Haranne","raw_affiliation_strings":["GlobalFoundries, Dresden, Germany","GLOBALFOUNDRIES Dresden (Germany)"],"affiliations":[{"raw_affiliation_string":"GlobalFoundries, Dresden, Germany","institution_ids":["https://openalex.org/I4210142027"]},{"raw_affiliation_string":"GLOBALFOUNDRIES Dresden (Germany)","institution_ids":["https://openalex.org/I4210142027"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5079412475","display_name":"Sorin P. Voinigescu","orcid":"https://orcid.org/0000-0001-5134-1970"},"institutions":[{"id":"https://openalex.org/I185261750","display_name":"University of Toronto","ror":"https://ror.org/03dbr7087","country_code":"CA","type":"education","lineage":["https://openalex.org/I185261750"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Sorin P. Voinigescu","raw_affiliation_strings":["ECE Department, University of Toronto, Toronto, ON, Canada","[ECE Department, University of Toronto, Toronto, ON, CANADA]"],"affiliations":[{"raw_affiliation_string":"ECE Department, University of Toronto, Toronto, ON, Canada","institution_ids":["https://openalex.org/I185261750"]},{"raw_affiliation_string":"[ECE Department, University of Toronto, Toronto, ON, CANADA]","institution_ids":["https://openalex.org/I185261750"]}]}],"institutions":[],"countries_distinct_count":3,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5074810352"],"corresponding_institution_ids":["https://openalex.org/I185261750"],"apc_list":null,"apc_paid":null,"fwci":1.7714,"has_fulltext":false,"cited_by_count":29,"citation_normalized_percentile":{"value":0.84426646,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"271","last_page":"274"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.7564795017242432},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.5746362805366516},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.5441085696220398},{"id":"https://openalex.org/keywords/amplifier","display_name":"Amplifier","score":0.4630662798881531},{"id":"https://openalex.org/keywords/clock-generator","display_name":"Clock generator","score":0.458609402179718},{"id":"https://openalex.org/keywords/capacitor","display_name":"Capacitor","score":0.4307914972305298},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.39168745279312134},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3434686064720154},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.3279568552970886},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.3271174728870392},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.2827182710170746},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.21193864941596985},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.1438722312450409}],"concepts":[{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.7564795017242432},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.5746362805366516},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.5441085696220398},{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.4630662798881531},{"id":"https://openalex.org/C2778023540","wikidata":"https://www.wikidata.org/wiki/Q2164847","display_name":"Clock generator","level":4,"score":0.458609402179718},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.4307914972305298},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.39168745279312134},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3434686064720154},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.3279568552970886},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.3271174728870392},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.2827182710170746},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.21193864941596985},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.1438722312450409}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/bcicts.2018.8550842","is_oa":false,"landing_page_url":"https://doi.org/10.1109/bcicts.2018.8550842","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.8600000143051147,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W2585039363","https://openalex.org/W2781517019","https://openalex.org/W2789418862","https://openalex.org/W2800004760","https://openalex.org/W2902667012"],"related_works":["https://openalex.org/W2096197213","https://openalex.org/W2108930055","https://openalex.org/W2513016670","https://openalex.org/W2177703353","https://openalex.org/W2534725721","https://openalex.org/W2483085195","https://openalex.org/W1565056247","https://openalex.org/W2124847927","https://openalex.org/W2074774443","https://openalex.org/W1996720205"],"abstract_inverted_index":{"The":[0,114,137],"analog":[1,143],"front-end":[2],"of":[3,44,64,70,141,148,173],"a":[4,52,59,122,169],"6-to-8":[5],"bit":[6],"128-GS/s":[7],"SAR":[8,73],"ADC":[9],"architecture":[10],"with":[11,39,100,121],"record":[12,77],"60-GHz":[13],"input":[14,125],"bandwidth":[15,78],"is":[16,119,145],"presented.":[17],"It":[18,167],"includes":[19],"the":[20,45,65,71,82,87,142,155,163],"data":[21,83,156],"path,":[22],"25%":[23],"duty-cycle":[24],"dc-32":[25],"GHz":[26],"quadrature":[27,116],"clock":[28,89,117,164],"generator,":[29],"4":[30],"master,":[31],"and":[32,79,86,95,103,159],"32":[33,46,72],"slave":[34,47],"track-and-hold":[35],"(T&H)":[36],"circuits":[37],"formed":[38],"CMOS":[40,48,134],"series":[41],"switches.":[42],"Each":[43],"T&Hs":[49],"drives":[50],"either":[51],"50-\u03a9":[53],"output":[54],"buffer":[55],"(for":[56],"testing)":[57],"or":[58],"30-fF":[60],"hold":[61],"capacitor,":[62],"representative":[63],"load":[66],"provided":[67],"by":[68,132,154,162],"each":[69],"sub-ADCs.":[74],"To":[75],"achieve":[76],"sampling":[80,157],"rate,":[81],"distribution":[84],"network":[85],"singleended-to-differential":[88],"amplifier":[90],"use":[91],"novel":[92,123],"0.8-V":[93,127],"n-MOS":[94],"1.2-V":[96],"p-MOS":[97],"Cherry-Hooper":[98],"buffers":[99],"good":[101],"common-mode":[102],"supply":[104],"rejection":[105],"beyond":[106],"100":[107],"GHz,":[108],"validated":[109],"through":[110],"smalland":[111],"large-signal":[112],"measurements.":[113],"32-GHz":[115],"generator":[118],"realized":[120],"80-GHz":[124],"bandwidth,":[126],"quasi-CML":[128],"static":[129],"divider,":[130],"followed":[131],"inductively-peaked":[133],"logic":[135],"circuits.":[136],"total":[138,170],"power":[139],"consumption":[140],"frontend":[144],"320":[146],"mW":[147,151,161],"which":[149],"120":[150],"are":[152],"consumed":[153],"interleaver":[158],"200":[160],"generation":[165],"unit.":[166],"occupies":[168],"die":[171],"area":[172],"0.65":[174],"mm":[175],"\u00d7":[176],"0.37":[177],"mm.":[178]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":3},{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":5},{"year":2021,"cited_by_count":7},{"year":2020,"cited_by_count":4},{"year":2019,"cited_by_count":4},{"year":2018,"cited_by_count":1}],"updated_date":"2026-03-05T07:30:30.508283","created_date":"2025-10-10T00:00:00"}
