{"id":"https://openalex.org/W4401808097","doi":"https://doi.org/10.1109/atsip62566.2024.10638978","title":"FPGA based Unified Architecture for H.266/VVC 1-D DCT-II Transform","display_name":"FPGA based Unified Architecture for H.266/VVC 1-D DCT-II Transform","publication_year":2024,"publication_date":"2024-07-11","ids":{"openalex":"https://openalex.org/W4401808097","doi":"https://doi.org/10.1109/atsip62566.2024.10638978"},"language":"en","primary_location":{"id":"doi:10.1109/atsip62566.2024.10638978","is_oa":false,"landing_page_url":"https://doi.org/10.1109/atsip62566.2024.10638978","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 IEEE 7th International Conference on Advanced Technologies, Signal and Image Processing (ATSIP)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5106693450","display_name":"Jubran Alshahrani","orcid":null},"institutions":[{"id":"https://openalex.org/I82952536","display_name":"King Khalid University","ror":"https://ror.org/052kwzs30","country_code":"SA","type":"education","lineage":["https://openalex.org/I82952536"]}],"countries":["SA"],"is_corresponding":false,"raw_author_name":"Jubran Alshahrani","raw_affiliation_strings":["King Khalid University,College of Engineering,Electrical Engineering Department,Abha,Asir,Saudi Arabia,61413"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"King Khalid University,College of Engineering,Electrical Engineering Department,Abha,Asir,Saudi Arabia,61413","institution_ids":["https://openalex.org/I82952536"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5029627007","display_name":"Hassen Loukil","orcid":"https://orcid.org/0000-0002-2028-3517"},"institutions":[{"id":"https://openalex.org/I82952536","display_name":"King Khalid University","ror":"https://ror.org/052kwzs30","country_code":"SA","type":"education","lineage":["https://openalex.org/I82952536"]}],"countries":["SA"],"is_corresponding":false,"raw_author_name":"Hassen Loukil","raw_affiliation_strings":["King Khalid University,College of Engineering,Electrical Engineering Department,Abha,Asir,Saudi Arabia,61413"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"King Khalid University,College of Engineering,Electrical Engineering Department,Abha,Asir,Saudi Arabia,61413","institution_ids":["https://openalex.org/I82952536"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I82952536"],"apc_list":null,"apc_paid":null,"fwci":0.4171,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.53976692,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":91,"max":95},"biblio":{"volume":null,"issue":null,"first_page":"87","last_page":"92"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10901","display_name":"Advanced Data Compression Techniques","score":0.9975000023841858,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10741","display_name":"Video Coding and Compression Technologies","score":0.9972000122070312,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.8377139568328857},{"id":"https://openalex.org/keywords/discrete-cosine-transform","display_name":"Discrete cosine transform","score":0.8129817247390747},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.7269504070281982},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.679407000541687},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5110953450202942},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4628210961818695},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.36188963055610657},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.2018783688545227},{"id":"https://openalex.org/keywords/image","display_name":"Image (mathematics)","score":0.1318361759185791},{"id":"https://openalex.org/keywords/art","display_name":"Art","score":0.0982409119606018}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8377139568328857},{"id":"https://openalex.org/C2221639","wikidata":"https://www.wikidata.org/wiki/Q2877","display_name":"Discrete cosine transform","level":3,"score":0.8129817247390747},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.7269504070281982},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.679407000541687},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5110953450202942},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4628210961818695},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.36188963055610657},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.2018783688545227},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.1318361759185791},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0982409119606018},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/atsip62566.2024.10638978","is_oa":false,"landing_page_url":"https://doi.org/10.1109/atsip62566.2024.10638978","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 IEEE 7th International Conference on Advanced Technologies, Signal and Image Processing (ATSIP)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W610997267","https://openalex.org/W2105815873","https://openalex.org/W2792384278","https://openalex.org/W2803516691","https://openalex.org/W2896105831","https://openalex.org/W3023780113","https://openalex.org/W4241699713","https://openalex.org/W6618789946"],"related_works":["https://openalex.org/W1916685473","https://openalex.org/W2055682261","https://openalex.org/W1993363272","https://openalex.org/W2186390138","https://openalex.org/W2060035984","https://openalex.org/W2790129917","https://openalex.org/W1967938402","https://openalex.org/W2386041993","https://openalex.org/W1608572506","https://openalex.org/W2038503502"],"abstract_inverted_index":{"In":[0],"2020,":[1],"the":[2,99,107,119,132],"cutting-edge":[3],"video":[4,28],"compression":[5,29],"standard":[6,23,111],"known":[7],"as":[8,18],"Versatile":[9,108],"Video":[10,109],"Coding":[11,60,110],"(VVC)":[12],"was":[13],"introduced.":[14],"Also":[15],"referred":[16],"to":[17,79,123,164],"VVC":[19,32],"and":[20,43,66],"H.266,":[21],"this":[22],"promises":[24],"significant":[25],"advancements":[26],"in":[27],"technology.":[30],"The":[31,168],"codec":[33],"operates":[34],"on":[35,131],"a":[36,46,139],"block-based":[37],"hybrid":[38],"model,":[39],"boasting":[40],"both":[41],"complexity":[42],"capability.":[44],"Employing":[45],"flexible":[47],"block":[48],"partitioning":[49],"structure":[50],"called":[51],"Residual":[52],"Quadtree":[53],"(RQT),":[54],"it":[55],"utilizes":[56],"three":[57],"fundamental":[58],"units:":[59],"Unit":[61,64,68],"(CU),":[62],"Prediction":[63],"(PU),":[65],"Transform":[67,103],"(TU),":[69],"with":[70],"transform":[71,84,121,137,141,157],"unit":[72,122],"sizes":[73,158],"ranging":[74,159],"from":[75,160],"$2":[76,161],"\\times":[77,81,145,162,166],"2$":[78,163],"$64":[80,144,165],"64$.":[82,167],"Each":[83],"size":[85,147],"is":[86,116,148],"computed":[87],"using":[88,174],"its":[89],"designated":[90],"matrix.":[91],"This":[92,153],"study":[93],"proposes":[94],"an":[95],"FPGA-based":[96],"implementation":[97],"for":[98],"one-dimensional":[100],"Discrete":[101],"Cosine":[102],"(DCT-II)":[104],"component":[105],"of":[106,135,143],"(VVC).":[112],"A":[113],"novel":[114],"technique":[115],"introduced,":[117],"utilizing":[118],"DCT-II":[120,136],"generate":[124],"all":[125,151],"other":[126],"required":[127],"sizes.":[128,152],"By":[129],"capitalizing":[130],"symmetrical":[133],"properties":[134],"elements,":[138],"single":[140],"matrix":[142],"64$":[146],"utilized":[149],"across":[150],"architecture":[154],"seamlessly":[155],"accommodates":[156],"design":[169],"specifications":[170],"have":[171],"been":[172],"articulated":[173],"very":[175],"high-speed":[176],"integrated":[177],"circuit":[178],"hardware":[179],"description":[180],"language":[181],"(VHDL).":[182]},"counts_by_year":[{"year":2025,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}