{"id":"https://openalex.org/W7155412859","doi":"https://doi.org/10.1109/ats66998.2025.00010","title":"Weight-Aware Scan Chain Stitching for Shift Power Minimization under Routing Constraints","display_name":"Weight-Aware Scan Chain Stitching for Shift Power Minimization under Routing Constraints","publication_year":2025,"publication_date":"2025-12-16","ids":{"openalex":"https://openalex.org/W7155412859","doi":"https://doi.org/10.1109/ats66998.2025.00010"},"language":null,"primary_location":{"id":"doi:10.1109/ats66998.2025.00010","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ats66998.2025.00010","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IEEE 34th Asian Test Symposium (ATS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5116309546","display_name":"Rohit Badjatya","orcid":null},"institutions":[{"id":"https://openalex.org/I162827531","display_name":"Indian Institute of Technology Bombay","ror":"https://ror.org/02qyf5152","country_code":"IN","type":"education","lineage":["https://openalex.org/I162827531"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Rohit Badjatya","raw_affiliation_strings":["Indian Institute of Technology,Dept. of Electrical Engineering,Bombay,Mumbai,India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Indian Institute of Technology,Dept. of Electrical Engineering,Bombay,Mumbai,India","institution_ids":["https://openalex.org/I162827531"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5048517246","display_name":"Kapil Sharma","orcid":"https://orcid.org/0000-0002-4412-7690"},"institutions":[{"id":"https://openalex.org/I162827531","display_name":"Indian Institute of Technology Bombay","ror":"https://ror.org/02qyf5152","country_code":"IN","type":"education","lineage":["https://openalex.org/I162827531"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Kapil Sharma","raw_affiliation_strings":["Indian Institute of Technology,Dept. of Electrical Engineering,Bombay,Mumbai,India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Indian Institute of Technology,Dept. of Electrical Engineering,Bombay,Mumbai,India","institution_ids":["https://openalex.org/I162827531"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5134463207","display_name":"Makoto Ikeda","orcid":null},"institutions":[{"id":"https://openalex.org/I74801974","display_name":"The University of Tokyo","ror":"https://ror.org/057zh3y96","country_code":"JP","type":"education","lineage":["https://openalex.org/I74801974"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Makoto Ikeda","raw_affiliation_strings":["University of Tokyo,Graduate School of Engineering,Tokyo,Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Tokyo,Graduate School of Engineering,Tokyo,Japan","institution_ids":["https://openalex.org/I74801974"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5134464712","display_name":"Masahiro Fujita","orcid":null},"institutions":[{"id":"https://openalex.org/I74801974","display_name":"The University of Tokyo","ror":"https://ror.org/057zh3y96","country_code":"JP","type":"education","lineage":["https://openalex.org/I74801974"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Masahiro Fujita","raw_affiliation_strings":["University of Tokyo,Dept. of Electrical Engineering,Tokyo,Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Tokyo,Dept. of Electrical Engineering,Tokyo,Japan","institution_ids":["https://openalex.org/I74801974"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5134398816","display_name":"Virendra Singh","orcid":null},"institutions":[{"id":"https://openalex.org/I162827531","display_name":"Indian Institute of Technology Bombay","ror":"https://ror.org/02qyf5152","country_code":"IN","type":"education","lineage":["https://openalex.org/I162827531"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Virendra Singh","raw_affiliation_strings":["Indian Institute of Technology,Dept. of Electrical Engineering,Bombay,Mumbai,India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Indian Institute of Technology,Dept. of Electrical Engineering,Bombay,Mumbai,India","institution_ids":["https://openalex.org/I162827531"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.7488671,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"7","last_page":"12"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.44859999418258667,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.44859999418258667,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.13359999656677246,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12923","display_name":"Digital Image Processing Techniques","score":0.04600000008940697,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/minification","display_name":"Minification","score":0.6955999732017517},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.5038999915122986},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.4239000082015991},{"id":"https://openalex.org/keywords/image-stitching","display_name":"Image stitching","score":0.38960000872612},{"id":"https://openalex.org/keywords/chain","display_name":"Chain (unit)","score":0.3718000054359436}],"concepts":[{"id":"https://openalex.org/C147764199","wikidata":"https://www.wikidata.org/wiki/Q6865248","display_name":"Minification","level":2,"score":0.6955999732017517},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6168000102043152},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.5038999915122986},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.4239000082015991},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.4203000068664551},{"id":"https://openalex.org/C29081049","wikidata":"https://www.wikidata.org/wiki/Q1364242","display_name":"Image stitching","level":2,"score":0.38960000872612},{"id":"https://openalex.org/C199185054","wikidata":"https://www.wikidata.org/wiki/Q552299","display_name":"Chain (unit)","level":2,"score":0.3718000054359436},{"id":"https://openalex.org/C126255220","wikidata":"https://www.wikidata.org/wiki/Q141495","display_name":"Mathematical optimization","level":1,"score":0.3529999852180481},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.31450000405311584},{"id":"https://openalex.org/C2777212361","wikidata":"https://www.wikidata.org/wiki/Q5127848","display_name":"Class (philosophy)","level":2,"score":0.27570000290870667},{"id":"https://openalex.org/C2778112365","wikidata":"https://www.wikidata.org/wiki/Q3511065","display_name":"Sequence (biology)","level":2,"score":0.2563999891281128}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ats66998.2025.00010","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ats66998.2025.00010","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IEEE 34th Asian Test Symposium (ATS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.6121101379394531}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":[],"abstract_inverted_index":{"Scan":[0],"chain":[1,56,104],"architecture":[2],"is":[3],"a":[4,30,53,90],"widely":[5],"adopted":[6],"design-for-testability":[7],"(DFT)":[8],"technique":[9],"in":[10,85,93],"modern":[11],"VLSI":[12],"circuits.":[13],"However,":[14],"with":[15],"the":[16],"increasing":[17],"complexity":[18],"of":[19,83],"integrated":[20],"circuits,":[21],"excessive":[22],"shift":[23,87],"power":[24,66,88,113],"during":[25],"scan":[26,55,86,103],"testing":[27],"has":[28],"become":[29],"critical":[31],"concern,":[32],"especially":[33],"for":[34,107],"power-constrained":[35],"designs,":[36],"as":[37],"it":[38],"can":[39],"lead":[40],"to":[41,97],"increased":[42],"thermal":[43],"stress":[44],"and":[45,64,76,89],"reduced":[46],"reliability.":[47],"In":[48],"this":[49],"paper,":[50],"we":[51],"propose":[52],"weight-aware":[54],"stitching":[57],"methodology":[58],"that":[59],"effectively":[60],"reduces":[61],"both":[62],"shift-in":[63],"shift-out":[65],"while":[67],"maintaining":[68],"optimized":[69],"routing":[70,94,110],"length.":[71],"Experimental":[72],"evaluations":[73],"on":[74],"ISCAS\u201989":[75],"ITC\u201999":[77],"benchmark":[78],"circuits":[79],"demonstrate":[80],"average":[81],"reductions":[82],"14.5%":[84],"68.5%":[91],"improvement":[92],"efficiency":[95],"compared":[96],"state-of-the-art":[98],"techniques.":[99],"Index":[100],"Terms-scan-based":[101],"testing,":[102],"stitching,":[105],"design":[106],"testability":[108],"(DFT),":[109],"constraint,":[111],"low":[112],"testing.":[114]},"counts_by_year":[],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2026-04-24T00:00:00"}