{"id":"https://openalex.org/W4388820959","doi":"https://doi.org/10.1109/ats59501.2023.10317970","title":"Fault Simulation Acceleration Based on ARM Multi-core CPU Architecture","display_name":"Fault Simulation Acceleration Based on ARM Multi-core CPU Architecture","publication_year":2023,"publication_date":"2023-10-14","ids":{"openalex":"https://openalex.org/W4388820959","doi":"https://doi.org/10.1109/ats59501.2023.10317970"},"language":"en","primary_location":{"id":"doi:10.1109/ats59501.2023.10317970","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ats59501.2023.10317970","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 IEEE 32nd Asian Test Symposium (ATS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5113050169","display_name":"Shi-Jie Ye","orcid":null},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"Shi-Jie Ye","raw_affiliation_strings":["HiSilicon,Shenzhen,China","HiSilicon, Shenzhen, China"],"affiliations":[{"raw_affiliation_string":"HiSilicon,Shenzhen,China","institution_ids":[]},{"raw_affiliation_string":"HiSilicon, Shenzhen, China","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5114101034","display_name":"Yun-Ju Liu","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Yun-Ju Liu","raw_affiliation_strings":["HiSilicon,Shenzhen,China","HiSilicon, Shenzhen, China"],"affiliations":[{"raw_affiliation_string":"HiSilicon,Shenzhen,China","institution_ids":[]},{"raw_affiliation_string":"HiSilicon, Shenzhen, China","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5082611743","display_name":"Liuzheng Wang","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Liu-Zheng Wang","raw_affiliation_strings":["HiSilicon,Shenzhen,China","HiSilicon, Shenzhen, China"],"affiliations":[{"raw_affiliation_string":"HiSilicon,Shenzhen,China","institution_ids":[]},{"raw_affiliation_string":"HiSilicon, Shenzhen, China","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5031170152","display_name":"Hui\u2010Ling Zhen","orcid":"https://orcid.org/0000-0003-0310-3825"},"institutions":[{"id":"https://openalex.org/I2250955327","display_name":"Huawei Technologies (China)","ror":"https://ror.org/00cmhce21","country_code":"CN","type":"company","lineage":["https://openalex.org/I2250955327"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Hui-Ling Zhen","raw_affiliation_strings":["Huawei, Hong Kong,Hong Kong,China","Huawei, Hong Kong, Hong Kong, China"],"affiliations":[{"raw_affiliation_string":"Huawei, Hong Kong,Hong Kong,China","institution_ids":["https://openalex.org/I2250955327"]},{"raw_affiliation_string":"Huawei, Hong Kong, Hong Kong, China","institution_ids":["https://openalex.org/I2250955327"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101756433","display_name":"Weiming Zhang","orcid":"https://orcid.org/0000-0001-6556-7241"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Wei-Ming Zhang","raw_affiliation_strings":["HiSilicon,Suzhou,China","HiSilicon, Suzhou, China"],"affiliations":[{"raw_affiliation_string":"HiSilicon,Suzhou,China","institution_ids":[]},{"raw_affiliation_string":"HiSilicon, Suzhou, China","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100383569","display_name":"Yu Huang","orcid":"https://orcid.org/0000-0002-6182-3153"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Yu Huang","raw_affiliation_strings":["HiSilicon,Shenzhen,China","HiSilicon, Shenzhen, China"],"affiliations":[{"raw_affiliation_string":"HiSilicon,Shenzhen,China","institution_ids":[]},{"raw_affiliation_string":"HiSilicon, Shenzhen, China","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5113050169"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.6151,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.64934045,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":95},"biblio":{"volume":null,"issue":null,"first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8012226223945618},{"id":"https://openalex.org/keywords/acceleration","display_name":"Acceleration","score":0.6557216644287109},{"id":"https://openalex.org/keywords/node","display_name":"Node (physics)","score":0.5796374678611755},{"id":"https://openalex.org/keywords/central-processing-unit","display_name":"Central processing unit","score":0.5429924726486206},{"id":"https://openalex.org/keywords/energy-consumption","display_name":"Energy consumption","score":0.5272150039672852},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5194453597068787},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.4800316393375397},{"id":"https://openalex.org/keywords/fault","display_name":"Fault (geology)","score":0.4796738624572754},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.44935157895088196},{"id":"https://openalex.org/keywords/fault-tolerance","display_name":"Fault tolerance","score":0.41718918085098267},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.4136166274547577},{"id":"https://openalex.org/keywords/supercomputer","display_name":"Supercomputer","score":0.41219067573547363},{"id":"https://openalex.org/keywords/efficient-energy-use","display_name":"Efficient energy use","score":0.41095712780952454},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.28658047318458557},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.14496776461601257},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1060025691986084}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8012226223945618},{"id":"https://openalex.org/C117896860","wikidata":"https://www.wikidata.org/wiki/Q11376","display_name":"Acceleration","level":2,"score":0.6557216644287109},{"id":"https://openalex.org/C62611344","wikidata":"https://www.wikidata.org/wiki/Q1062658","display_name":"Node (physics)","level":2,"score":0.5796374678611755},{"id":"https://openalex.org/C49154492","wikidata":"https://www.wikidata.org/wiki/Q5300","display_name":"Central processing unit","level":2,"score":0.5429924726486206},{"id":"https://openalex.org/C2780165032","wikidata":"https://www.wikidata.org/wiki/Q16869822","display_name":"Energy consumption","level":2,"score":0.5272150039672852},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5194453597068787},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.4800316393375397},{"id":"https://openalex.org/C175551986","wikidata":"https://www.wikidata.org/wiki/Q47089","display_name":"Fault (geology)","level":2,"score":0.4796738624572754},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.44935157895088196},{"id":"https://openalex.org/C63540848","wikidata":"https://www.wikidata.org/wiki/Q3140932","display_name":"Fault tolerance","level":2,"score":0.41718918085098267},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.4136166274547577},{"id":"https://openalex.org/C83283714","wikidata":"https://www.wikidata.org/wiki/Q121117","display_name":"Supercomputer","level":2,"score":0.41219067573547363},{"id":"https://openalex.org/C2742236","wikidata":"https://www.wikidata.org/wiki/Q924713","display_name":"Efficient energy use","level":2,"score":0.41095712780952454},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.28658047318458557},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.14496776461601257},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1060025691986084},{"id":"https://openalex.org/C66938386","wikidata":"https://www.wikidata.org/wiki/Q633538","display_name":"Structural engineering","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C127313418","wikidata":"https://www.wikidata.org/wiki/Q1069","display_name":"Geology","level":0,"score":0.0},{"id":"https://openalex.org/C74650414","wikidata":"https://www.wikidata.org/wiki/Q11397","display_name":"Classical mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C165205528","wikidata":"https://www.wikidata.org/wiki/Q83371","display_name":"Seismology","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ats59501.2023.10317970","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ats59501.2023.10317970","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 IEEE 32nd Asian Test Symposium (ATS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.75}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":3,"referenced_works":["https://openalex.org/W2022958915","https://openalex.org/W2134856947","https://openalex.org/W4312761315"],"related_works":["https://openalex.org/W2384867379","https://openalex.org/W2329539859","https://openalex.org/W2227905990","https://openalex.org/W2765823764","https://openalex.org/W3214280620","https://openalex.org/W3191490922","https://openalex.org/W2158463942","https://openalex.org/W2473478803","https://openalex.org/W2729363167","https://openalex.org/W2060611139"],"abstract_inverted_index":{"Fault":[0],"simulation":[1,22,41,82,112,128],"plays":[2],"an":[3,125],"important":[4],"role":[5],"in":[6,120,176],"ATPG":[7],"and":[8,35,45,53,61,73,102,140,142,160,170,174],"fault":[9,81,111,177],"diagnosis":[10],"of":[11,19,23,25,28,33,80,91],"integrated":[12],"circuits.":[13],"However,":[14,56],"with":[15],"the":[16,21,40,78,89,143],"increasing":[17],"complexity":[18],"chips,":[20],"tens":[24],"millions":[26],"faults":[27],"VLSI":[29],"needs":[30],"a":[31,106],"lot":[32],"time":[34],"computing":[36,95],"resources.":[37],"To":[38],"improve":[39],"efficiency,":[42],"many":[43],"methods":[44,169],"technologies":[46],"have":[47],"emerged,":[48],"such":[49,66],"as":[50,67],"GPU":[51],"acceleration":[52,79],"distributed":[54],"computing.":[55],"there":[57],"are":[58],"some":[59],"challenges":[60],"limitations":[62],"to":[63,155],"these":[64,168],"approaches,":[65],"high":[68,70],"cost,":[69,98],"energy":[71,100],"consumption,":[72,101],"programming":[74],"complexity.":[75],"In":[76,130],"contrast,":[77],"based":[83,113],"on":[84,114,167],"ARM":[85,115],"multi-core":[86,116],"CPU":[87,117,144],"has":[88,135],"characteristics":[90],"strong":[92],"multi-threaded":[93],"parallel":[94,127],"capability,":[96],"low":[97,99],"easy":[103],"implementation.":[104],"Therefore,":[105],"new":[107],"method":[108],"for":[109],"accelerating":[110],"is":[118],"proposed":[119],"this":[121,131],"paper,":[122],"which":[123],"adopts":[124],"enhanced":[126],"method.":[129],"method,":[132],"each":[133],"node":[134],"its":[136],"own":[137],"memory":[138],"space":[139],"processor,":[141],"can":[145],"work":[146],"at":[147],"full":[148],"load.":[149],"This":[150,163],"paper":[151,164],"also":[152],"provides":[153],"solutions":[154],"NUMA":[156],"affinity,":[157],"cross-node":[158],"access":[159],"other":[161],"problems.":[162],"will":[165],"elaborate":[166],"demonstrate":[171],"their":[172],"effectiveness":[173],"accuracy":[175],"simulation.":[178]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}