{"id":"https://openalex.org/W2102136494","doi":"https://doi.org/10.1109/ats.2002.1181737","title":"Test scheduling of BISTed memory cores for SoC","display_name":"Test scheduling of BISTed memory cores for SoC","publication_year":2003,"publication_date":"2003-06-26","ids":{"openalex":"https://openalex.org/W2102136494","doi":"https://doi.org/10.1109/ats.2002.1181737","mag":"2102136494"},"language":"en","primary_location":{"id":"doi:10.1109/ats.2002.1181737","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ats.2002.1181737","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 11th Asian Test Symposium, 2002. (ATS '02).","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5084041065","display_name":"Chih-Wea Wang","orcid":null},"institutions":[{"id":"https://openalex.org/I25846049","display_name":"National Tsing Hua University","ror":"https://ror.org/00zdnkx70","country_code":"TW","type":"education","lineage":["https://openalex.org/I25846049"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Chih-Wea Wang","raw_affiliation_strings":["Laboratory for Reliable Computing, Department of Electrical Engineering, National Tsing Hua University, Hsinchu, Taiwan","Dept. of Electr. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Laboratory for Reliable Computing, Department of Electrical Engineering, National Tsing Hua University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I25846049"]},{"raw_affiliation_string":"Dept. of Electr. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan#TAB#","institution_ids":["https://openalex.org/I25846049"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109849412","display_name":"Jing-Reng Huang","orcid":null},"institutions":[{"id":"https://openalex.org/I25846049","display_name":"National Tsing Hua University","ror":"https://ror.org/00zdnkx70","country_code":"TW","type":"education","lineage":["https://openalex.org/I25846049"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Jing-Reng Huang","raw_affiliation_strings":["Laboratory for Reliable Computing, Department of Electrical Engineering, National Tsing Hua University, Hsinchu, Taiwan","Dept. of Electr. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Laboratory for Reliable Computing, Department of Electrical Engineering, National Tsing Hua University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I25846049"]},{"raw_affiliation_string":"Dept. of Electr. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan#TAB#","institution_ids":["https://openalex.org/I25846049"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100882309","display_name":"Yen-Fu Lin","orcid":null},"institutions":[{"id":"https://openalex.org/I25846049","display_name":"National Tsing Hua University","ror":"https://ror.org/00zdnkx70","country_code":"TW","type":"education","lineage":["https://openalex.org/I25846049"]},{"id":"https://openalex.org/I4210086231","display_name":"Global Unichip (Taiwan)","ror":"https://ror.org/00005jn19","country_code":"TW","type":"company","lineage":["https://openalex.org/I4210086231"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Yen-Fu Lin","raw_affiliation_strings":["Global UniChip Corporation, Hsinchu, Taiwan","Laboratory for Reliable Computing, Department of Electrical Engineering, National Tsing Hua University, Hsinchu, Taiwan","Dept. of Electr. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Global UniChip Corporation, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I4210086231"]},{"raw_affiliation_string":"Laboratory for Reliable Computing, Department of Electrical Engineering, National Tsing Hua University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I25846049"]},{"raw_affiliation_string":"Dept. of Electr. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan#TAB#","institution_ids":["https://openalex.org/I25846049"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5074591647","display_name":"Kuo-Liang Cheng","orcid":null},"institutions":[{"id":"https://openalex.org/I25846049","display_name":"National Tsing Hua University","ror":"https://ror.org/00zdnkx70","country_code":"TW","type":"education","lineage":["https://openalex.org/I25846049"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Kuo-Liang Cheng","raw_affiliation_strings":["Laboratory for Reliable Computing, Department of Electrical Engineering, National Tsing Hua University, Hsinchu, Taiwan","Dept. of Electr. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Laboratory for Reliable Computing, Department of Electrical Engineering, National Tsing Hua University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I25846049"]},{"raw_affiliation_string":"Dept. of Electr. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan#TAB#","institution_ids":["https://openalex.org/I25846049"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5029346217","display_name":"Chih-Tsun Huang","orcid":"https://orcid.org/0000-0002-0214-6826"},"institutions":[{"id":"https://openalex.org/I25846049","display_name":"National Tsing Hua University","ror":"https://ror.org/00zdnkx70","country_code":"TW","type":"education","lineage":["https://openalex.org/I25846049"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Chih-Tsun Huang","raw_affiliation_strings":["Laboratory for Reliable Computing, Department of Electrical Engineering, National Tsing Hua University, Hsinchu, Taiwan","Dept. of Electr. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Laboratory for Reliable Computing, Department of Electrical Engineering, National Tsing Hua University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I25846049"]},{"raw_affiliation_string":"Dept. of Electr. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan#TAB#","institution_ids":["https://openalex.org/I25846049"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5075548524","display_name":"Cheng\u2010Wen Wu","orcid":"https://orcid.org/0000-0001-8614-7908"},"institutions":[{"id":"https://openalex.org/I25846049","display_name":"National Tsing Hua University","ror":"https://ror.org/00zdnkx70","country_code":"TW","type":"education","lineage":["https://openalex.org/I25846049"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Chen-Wen Wu","raw_affiliation_strings":["Laboratory for Reliable Computing, Department of Electrical Engineering, National Tsing Hua University, Hsinchu, Taiwan","Dept. of Electr. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Laboratory for Reliable Computing, Department of Electrical Engineering, National Tsing Hua University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I25846049"]},{"raw_affiliation_string":"Dept. of Electr. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan#TAB#","institution_ids":["https://openalex.org/I25846049"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5071624937","display_name":"Youn-Long Lin","orcid":"https://orcid.org/0000-0002-4106-8082"},"institutions":[{"id":"https://openalex.org/I25846049","display_name":"National Tsing Hua University","ror":"https://ror.org/00zdnkx70","country_code":"TW","type":"education","lineage":["https://openalex.org/I25846049"]},{"id":"https://openalex.org/I4210086231","display_name":"Global Unichip (Taiwan)","ror":"https://ror.org/00005jn19","country_code":"TW","type":"company","lineage":["https://openalex.org/I4210086231"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Youn-Long Lin","raw_affiliation_strings":["Global UniChip Corporation, Hsinchu, Taiwan","Laboratory for Reliable Computing, Department of Electrical Engineering, National Tsing Hua University, Hsinchu, Taiwan","Global Unichip Corp"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Global UniChip Corporation, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I4210086231"]},{"raw_affiliation_string":"Laboratory for Reliable Computing, Department of Electrical Engineering, National Tsing Hua University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I25846049"]},{"raw_affiliation_string":"Global Unichip Corp","institution_ids":["https://openalex.org/I4210086231"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":7,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":2.4775,"has_fulltext":false,"cited_by_count":25,"citation_normalized_percentile":{"value":0.89287051,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"356","last_page":"361"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9951000213623047,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9864000082015991,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7352653741836548},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5353228449821472},{"id":"https://openalex.org/keywords/scheduling","display_name":"Scheduling (production processes)","score":0.4740045964717865},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3461386561393738},{"id":"https://openalex.org/keywords/mathematical-optimization","display_name":"Mathematical optimization","score":0.20634520053863525},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.12214350700378418}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7352653741836548},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5353228449821472},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.4740045964717865},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3461386561393738},{"id":"https://openalex.org/C126255220","wikidata":"https://www.wikidata.org/wiki/Q141495","display_name":"Mathematical optimization","level":1,"score":0.20634520053863525},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.12214350700378418}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ats.2002.1181737","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ats.2002.1181737","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 11th Asian Test Symposium, 2002. (ATS '02).","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.699999988079071,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W1483017465","https://openalex.org/W1504929233","https://openalex.org/W1900681996","https://openalex.org/W2024060531","https://openalex.org/W2056906361","https://openalex.org/W2082632465","https://openalex.org/W2120246395","https://openalex.org/W2132881562","https://openalex.org/W2140209837","https://openalex.org/W2142661102","https://openalex.org/W2154561258","https://openalex.org/W2157072942","https://openalex.org/W2169584262","https://openalex.org/W4242912069"],"related_works":["https://openalex.org/W4391375266","https://openalex.org/W2748952813","https://openalex.org/W2051487156","https://openalex.org/W2073681303","https://openalex.org/W2390279801","https://openalex.org/W2358668433","https://openalex.org/W4396701345","https://openalex.org/W2376932109","https://openalex.org/W2001405890","https://openalex.org/W4396696052"],"abstract_inverted_index":{"The":[0,38],"test":[1,10,20,35],"scheduling":[2,21],"of":[3,14,52,82,95,102],"memory":[4,25,54,68,84,104],"cores":[5,26],"can":[6],"significantly":[7],"affect":[8],"the":[9,29,34,50,87,89,96,100],"time":[11,32],"and":[12],"power":[13,36],"system":[15],"chips.":[16],"We":[17],"propose":[18],"a":[19,45,71,79],"algorithm":[22,40],"for":[23,44,66,99],"BISTed":[24,53],"to":[27],"minimize":[28],"overall":[30],"testing":[31],"under":[33],"constraint.":[37],"proposed":[39],"combines":[41],"several":[42],"approaches":[43],"near-optimal":[46],"result,":[47],"based":[48],"on":[49],"properties":[51],"cores.":[55,85,105],"By":[56],"proper":[57],"partitioning,":[58],"an":[59],"analytic":[60],"exhaustive":[61],"search":[62],"finds":[63],"optimal":[64,97],"results":[65,90],"large":[67,80],"cores,":[69],"while":[70],"heuristic":[72],"ordering":[73],"with":[74],"simulated":[75],"annealing":[76],"further":[77],"handles":[78],"amount":[81],"smaller":[83],"On":[86],"average,":[88],"are":[91],"within":[92],"1%":[93],"difference":[94],"solution":[98],"cases":[101],"200":[103]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2013,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}