{"id":"https://openalex.org/W3082007995","doi":"https://doi.org/10.1109/async49171.2020.00021","title":"Test Oriented Design and Layout Generation of an Asynchronous Controller for the Blade Template","display_name":"Test Oriented Design and Layout Generation of an Asynchronous Controller for the Blade Template","publication_year":2020,"publication_date":"2020-05-01","ids":{"openalex":"https://openalex.org/W3082007995","doi":"https://doi.org/10.1109/async49171.2020.00021","mag":"3082007995"},"language":"en","primary_location":{"id":"doi:10.1109/async49171.2020.00021","is_oa":false,"landing_page_url":"https://doi.org/10.1109/async49171.2020.00021","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 26th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5007948704","display_name":"Felipe A. Kuentzer","orcid":"https://orcid.org/0000-0003-3177-372X"},"institutions":[{"id":"https://openalex.org/I92894754","display_name":"Innovations for High Performance Microelectronics","ror":"https://ror.org/0489gab80","country_code":"DE","type":"facility","lineage":["https://openalex.org/I315704651","https://openalex.org/I92894754"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"Felipe A. Kuentzer","raw_affiliation_strings":["IHP \u2013 Leibniz-Institut f\u00fcr innovative Mikroelektronik"],"affiliations":[{"raw_affiliation_string":"IHP \u2013 Leibniz-Institut f\u00fcr innovative Mikroelektronik","institution_ids":["https://openalex.org/I92894754"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5038825894","display_name":"Leonardo Rezende Juracy","orcid":"https://orcid.org/0000-0003-1445-7610"},"institutions":[{"id":"https://openalex.org/I45643870","display_name":"Pontif\u00edcia Universidade Cat\u00f3lica do Rio Grande do Sul","ror":"https://ror.org/025vmq686","country_code":"BR","type":"education","lineage":["https://openalex.org/I45643870"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Leonardo R. Juracy","raw_affiliation_strings":["Faculty of Informatics, PUCRS University"],"affiliations":[{"raw_affiliation_string":"Faculty of Informatics, PUCRS University","institution_ids":["https://openalex.org/I45643870"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101963901","display_name":"Matheus T. Moreira","orcid":"https://orcid.org/0000-0001-5030-9215"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Matheus T. Moreira","raw_affiliation_strings":["Chronos Tech, Research and Development"],"affiliations":[{"raw_affiliation_string":"Chronos Tech, Research and Development","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5012146188","display_name":"Alexandre M. Amory","orcid":"https://orcid.org/0000-0001-8432-3162"},"institutions":[{"id":"https://openalex.org/I45643870","display_name":"Pontif\u00edcia Universidade Cat\u00f3lica do Rio Grande do Sul","ror":"https://ror.org/025vmq686","country_code":"BR","type":"education","lineage":["https://openalex.org/I45643870"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Alexandre M. Amory","raw_affiliation_strings":["Faculty of Informatics, PUCRS University"],"affiliations":[{"raw_affiliation_string":"Faculty of Informatics, PUCRS University","institution_ids":["https://openalex.org/I45643870"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5007948704"],"corresponding_institution_ids":["https://openalex.org/I92894754"],"apc_list":null,"apc_paid":null,"fwci":0.2055,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.51011793,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"32 6","issue":null,"first_page":"86","last_page":"93"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/asynchronous-communication","display_name":"Asynchronous communication","score":0.6700953245162964},{"id":"https://openalex.org/keywords/controller","display_name":"Controller (irrigation)","score":0.6662434339523315},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6449292898178101},{"id":"https://openalex.org/keywords/testability","display_name":"Testability","score":0.6323925256729126},{"id":"https://openalex.org/keywords/design-for-testing","display_name":"Design for testing","score":0.5474489331245422},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5250931978225708},{"id":"https://openalex.org/keywords/pipeline","display_name":"Pipeline (software)","score":0.5116820335388184},{"id":"https://openalex.org/keywords/fault","display_name":"Fault (geology)","score":0.4365554451942444},{"id":"https://openalex.org/keywords/fault-tolerance","display_name":"Fault tolerance","score":0.4329250156879425},{"id":"https://openalex.org/keywords/fault-coverage","display_name":"Fault coverage","score":0.431638240814209},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.3527718782424927},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3211584687232971},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2906045913696289},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.1758236587047577},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.09629219770431519},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.08997020125389099}],"concepts":[{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.6700953245162964},{"id":"https://openalex.org/C203479927","wikidata":"https://www.wikidata.org/wiki/Q5165939","display_name":"Controller (irrigation)","level":2,"score":0.6662434339523315},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6449292898178101},{"id":"https://openalex.org/C51234621","wikidata":"https://www.wikidata.org/wiki/Q2149495","display_name":"Testability","level":2,"score":0.6323925256729126},{"id":"https://openalex.org/C190874656","wikidata":"https://www.wikidata.org/wiki/Q5264347","display_name":"Design for testing","level":3,"score":0.5474489331245422},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5250931978225708},{"id":"https://openalex.org/C43521106","wikidata":"https://www.wikidata.org/wiki/Q2165493","display_name":"Pipeline (software)","level":2,"score":0.5116820335388184},{"id":"https://openalex.org/C175551986","wikidata":"https://www.wikidata.org/wiki/Q47089","display_name":"Fault (geology)","level":2,"score":0.4365554451942444},{"id":"https://openalex.org/C63540848","wikidata":"https://www.wikidata.org/wiki/Q3140932","display_name":"Fault tolerance","level":2,"score":0.4329250156879425},{"id":"https://openalex.org/C126953365","wikidata":"https://www.wikidata.org/wiki/Q5438152","display_name":"Fault coverage","level":3,"score":0.431638240814209},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.3527718782424927},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3211584687232971},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2906045913696289},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.1758236587047577},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.09629219770431519},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.08997020125389099},{"id":"https://openalex.org/C127313418","wikidata":"https://www.wikidata.org/wiki/Q1069","display_name":"Geology","level":0,"score":0.0},{"id":"https://openalex.org/C165205528","wikidata":"https://www.wikidata.org/wiki/Q83371","display_name":"Seismology","level":1,"score":0.0},{"id":"https://openalex.org/C6557445","wikidata":"https://www.wikidata.org/wiki/Q173113","display_name":"Agronomy","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.0},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/async49171.2020.00021","is_oa":false,"landing_page_url":"https://doi.org/10.1109/async49171.2020.00021","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 26th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.8600000143051147,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":26,"referenced_works":["https://openalex.org/W1546526482","https://openalex.org/W1561610864","https://openalex.org/W2025340565","https://openalex.org/W2071429830","https://openalex.org/W2095351656","https://openalex.org/W2096906056","https://openalex.org/W2104677471","https://openalex.org/W2104938294","https://openalex.org/W2107163997","https://openalex.org/W2115264823","https://openalex.org/W2147504603","https://openalex.org/W2149534087","https://openalex.org/W2151802820","https://openalex.org/W2161331676","https://openalex.org/W2167931908","https://openalex.org/W2178247634","https://openalex.org/W2178304595","https://openalex.org/W2529177493","https://openalex.org/W2767796712","https://openalex.org/W2799246403","https://openalex.org/W2891377697","https://openalex.org/W2901182317","https://openalex.org/W4236432903","https://openalex.org/W4244634726","https://openalex.org/W6674720022","https://openalex.org/W6754867772"],"related_works":["https://openalex.org/W2107525390","https://openalex.org/W2157191248","https://openalex.org/W2150046587","https://openalex.org/W2142405811","https://openalex.org/W2114980936","https://openalex.org/W2164493372","https://openalex.org/W1594445436","https://openalex.org/W2128920253","https://openalex.org/W2164349885","https://openalex.org/W2118697956"],"abstract_inverted_index":{"Blade":[0,70],"is":[1,33,57,73],"a":[2,30,63],"bundled-data":[3],"asynchronous":[4],"template":[5,41],"to":[6,20,106],"cope":[7],"with":[8,75],"process,":[9],"voltage,":[10],"and":[11,128],"temperature":[12],"(PVT)":[13],"variability.":[14],"Its":[15],"timing":[16,31],"resilient":[17],"behavior":[18],"enables":[19],"extend":[21],"the":[22,36,40,44,52,69,82,89,102,107,110,121],"propagation":[23],"delay":[24],"of":[25,54,91,95,116,123],"certain":[26],"pipeline":[27],"stages":[28],"when":[29],"violation":[32],"detected.":[34],"Despite":[35],"recent":[37],"improvements":[38],"in":[39,101,118,125,130],"controller":[42,67,112],"design,":[43],"new":[45],"approaches":[46],"focus":[47],"mostly":[48],"on":[49],"performance,":[50],"but":[51],"testability":[53],"these":[55],"controllers":[56],"not":[58],"addressed.":[59],"This":[60],"paper":[61],"presents":[62,114],"test":[64],"oriented":[65],"Click-based":[66],"for":[68,98],"template,":[71],"which":[72],"compatible":[74],"commercial":[76],"EDAs.":[77],"The":[78],"results":[79],"show":[80],"that":[81],"proposed":[83,111],"functional":[84],"testing":[85],"approach":[86],"presents,":[87],"without":[88],"need":[90],"scan":[92],"cells,":[93],"100%":[94],"fault":[96],"coverage":[97],"stuck-at":[99],"faults":[100],"controller.":[103],"In":[104],"addition":[105],"full":[108],"testability,":[109],"also":[113],"gains":[115],"80%":[117],"throughput":[119],"at":[120],"cost":[122],"10%":[124],"silicon":[126],"area":[127],"6%":[129],"energy.":[131]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}