{"id":"https://openalex.org/W2907525512","doi":"https://doi.org/10.1109/async.2018.00037","title":"Case Study of Process Variation-Based Domain Partitioning of GPGPUs","display_name":"Case Study of Process Variation-Based Domain Partitioning of GPGPUs","publication_year":2018,"publication_date":"2018-05-01","ids":{"openalex":"https://openalex.org/W2907525512","doi":"https://doi.org/10.1109/async.2018.00037","mag":"2907525512"},"language":"en","primary_location":{"id":"doi:10.1109/async.2018.00037","is_oa":false,"landing_page_url":"https://doi.org/10.1109/async.2018.00037","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 24th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5000373910","display_name":"Shomit Das","orcid":"https://orcid.org/0009-0000-8001-5517"},"institutions":[{"id":"https://openalex.org/I1311921367","display_name":"Advanced Micro Devices (Canada)","ror":"https://ror.org/02yh0k313","country_code":"CA","type":"company","lineage":["https://openalex.org/I1311921367","https://openalex.org/I4210137977"]}],"countries":["CA"],"is_corresponding":true,"raw_author_name":"Shomit Das","raw_affiliation_strings":["Advanced Micro Devices, Inc"],"affiliations":[{"raw_affiliation_string":"Advanced Micro Devices, Inc","institution_ids":["https://openalex.org/I1311921367"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5005659585","display_name":"Michael LeBeane","orcid":null},"institutions":[{"id":"https://openalex.org/I1311921367","display_name":"Advanced Micro Devices (Canada)","ror":"https://ror.org/02yh0k313","country_code":"CA","type":"company","lineage":["https://openalex.org/I1311921367","https://openalex.org/I4210137977"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Michael LeBeane","raw_affiliation_strings":["Advanced Micro Devices, Inc"],"affiliations":[{"raw_affiliation_string":"Advanced Micro Devices, Inc","institution_ids":["https://openalex.org/I1311921367"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5077056823","display_name":"Bradford M. Beckmann","orcid":"https://orcid.org/0000-0002-5444-6521"},"institutions":[{"id":"https://openalex.org/I1311921367","display_name":"Advanced Micro Devices (Canada)","ror":"https://ror.org/02yh0k313","country_code":"CA","type":"company","lineage":["https://openalex.org/I1311921367","https://openalex.org/I4210137977"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Bradford Beckmann","raw_affiliation_strings":["Advanced Micro Devices, Inc"],"affiliations":[{"raw_affiliation_string":"Advanced Micro Devices, Inc","institution_ids":["https://openalex.org/I1311921367"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5040210678","display_name":"Greg Sadowski","orcid":null},"institutions":[{"id":"https://openalex.org/I1311921367","display_name":"Advanced Micro Devices (Canada)","ror":"https://ror.org/02yh0k313","country_code":"CA","type":"company","lineage":["https://openalex.org/I1311921367","https://openalex.org/I4210137977"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Greg Sadowski","raw_affiliation_strings":["Advanced Micro Devices, Inc"],"affiliations":[{"raw_affiliation_string":"Advanced Micro Devices, Inc","institution_ids":["https://openalex.org/I1311921367"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5000373910"],"corresponding_institution_ids":["https://openalex.org/I1311921367"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.18752443,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"119","last_page":"120"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/general-purpose-computing-on-graphics-processing-units","display_name":"General-purpose computing on graphics processing units","score":0.8210065364837646},{"id":"https://openalex.org/keywords/graphics-processing-unit","display_name":"Graphics processing unit","score":0.8173002004623413},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7790261507034302},{"id":"https://openalex.org/keywords/graphics","display_name":"Graphics","score":0.7376061677932739},{"id":"https://openalex.org/keywords/cuda","display_name":"CUDA","score":0.5726735591888428},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5596261620521545},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.5586482286453247},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.5384687185287476},{"id":"https://openalex.org/keywords/clock-rate","display_name":"Clock rate","score":0.5257787704467773},{"id":"https://openalex.org/keywords/process-variation","display_name":"Process variation","score":0.5018346309661865},{"id":"https://openalex.org/keywords/domain","display_name":"Domain (mathematical analysis)","score":0.48188310861587524},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.4177534580230713},{"id":"https://openalex.org/keywords/computational-science","display_name":"Computational science","score":0.3682222068309784},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.330197811126709},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.28138479590415955},{"id":"https://openalex.org/keywords/computer-graphics","display_name":"Computer graphics (images)","score":0.16904065012931824},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.13313212990760803}],"concepts":[{"id":"https://openalex.org/C50630238","wikidata":"https://www.wikidata.org/wiki/Q971505","display_name":"General-purpose computing on graphics processing units","level":3,"score":0.8210065364837646},{"id":"https://openalex.org/C2779851693","wikidata":"https://www.wikidata.org/wiki/Q183484","display_name":"Graphics processing unit","level":2,"score":0.8173002004623413},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7790261507034302},{"id":"https://openalex.org/C21442007","wikidata":"https://www.wikidata.org/wiki/Q1027879","display_name":"Graphics","level":2,"score":0.7376061677932739},{"id":"https://openalex.org/C2778119891","wikidata":"https://www.wikidata.org/wiki/Q477690","display_name":"CUDA","level":2,"score":0.5726735591888428},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5596261620521545},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.5586482286453247},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.5384687185287476},{"id":"https://openalex.org/C178693496","wikidata":"https://www.wikidata.org/wiki/Q911691","display_name":"Clock rate","level":3,"score":0.5257787704467773},{"id":"https://openalex.org/C93389723","wikidata":"https://www.wikidata.org/wiki/Q7247313","display_name":"Process variation","level":3,"score":0.5018346309661865},{"id":"https://openalex.org/C36503486","wikidata":"https://www.wikidata.org/wiki/Q11235244","display_name":"Domain (mathematical analysis)","level":2,"score":0.48188310861587524},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.4177534580230713},{"id":"https://openalex.org/C459310","wikidata":"https://www.wikidata.org/wiki/Q117801","display_name":"Computational science","level":1,"score":0.3682222068309784},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.330197811126709},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.28138479590415955},{"id":"https://openalex.org/C121684516","wikidata":"https://www.wikidata.org/wiki/Q7600677","display_name":"Computer graphics (images)","level":1,"score":0.16904065012931824},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.13313212990760803},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/async.2018.00037","is_oa":false,"landing_page_url":"https://doi.org/10.1109/async.2018.00037","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 24th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.47999998927116394,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W1815597787","https://openalex.org/W1951447215","https://openalex.org/W1975237352","https://openalex.org/W2095665333","https://openalex.org/W2135021459","https://openalex.org/W2147657366","https://openalex.org/W2528504743","https://openalex.org/W2529252381","https://openalex.org/W2767976779","https://openalex.org/W2770869942","https://openalex.org/W6746043959"],"related_works":["https://openalex.org/W2151046618","https://openalex.org/W1972148443","https://openalex.org/W1969233021","https://openalex.org/W2167646277","https://openalex.org/W2063573318","https://openalex.org/W2027443981","https://openalex.org/W2388314963","https://openalex.org/W3158047141","https://openalex.org/W1656096860","https://openalex.org/W2360624069"],"abstract_inverted_index":{"We":[0,25],"can":[1],"unlock":[2],"higher":[3],"performance":[4],"in":[5,94],"general":[6],"purpose":[7],"graphics":[8],"processing":[9],"unit":[10,70],"(GPGPU)":[11],"chips":[12],"by":[13],"adhering":[14],"to":[15,35,52,66,72],"local":[16],"environment":[17],"conditions":[18],"while":[19],"setting":[20],"a":[21],"timing":[22],"(clock)":[23],"reference.":[24],"propose":[26],"partitioning":[27],"the":[28,40,54,67,74],"GPU":[29],"chip":[30,41],"into":[31],"smaller":[32],"independent":[33],"domains":[34,55,93],"enable":[36,73],"finer":[37],"control":[38],"of":[39,88],"voltage":[42],"frequency":[43],"(V/F)":[44],"settings.":[45],"Post":[46],"silicon":[47],"(Si)":[48],"analysis":[49,87],"is":[50,63],"used":[51],"classify":[53],"as":[56],"fast,":[57],"'typical',":[58],"or":[59],"slow.":[60],"This":[61],"information":[62],"then":[64],"provided":[65],"system":[68],"management":[69],"(SMU)":[71],"appropriate":[75],"settings":[76],"for":[77],"power":[78],"optimization.":[79],"In":[80],"this":[81],"paper,":[82],"we":[83],"present":[84],"an":[85],"initial":[86],"power/performance":[89],"associated":[90],"with":[91],"fine-grain":[92],"GPUs.":[95]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}