{"id":"https://openalex.org/W2113235673","doi":"https://doi.org/10.1109/async.2004.1299289","title":"Non-uniform access asynchronous register files","display_name":"Non-uniform access asynchronous register files","publication_year":2004,"publication_date":"2004-06-10","ids":{"openalex":"https://openalex.org/W2113235673","doi":"https://doi.org/10.1109/async.2004.1299289","mag":"2113235673"},"language":"en","primary_location":{"id":"doi:10.1109/async.2004.1299289","is_oa":false,"landing_page_url":"https://doi.org/10.1109/async.2004.1299289","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"10th International Symposium on Asynchronous Circuits and Systems, 2004. Proceedings.","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5006002801","display_name":"David Fang","orcid":null},"institutions":[{"id":"https://openalex.org/I205783295","display_name":"Cornell University","ror":"https://ror.org/05bnh6r87","country_code":"US","type":"education","lineage":["https://openalex.org/I205783295"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"D. Fang","raw_affiliation_strings":["Computer Systems Laboratory, Electrical and Computer Engineering, Cornell University, USA","Comput. Syst. Lab., Cornell Univ., Ithaca, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Computer Systems Laboratory, Electrical and Computer Engineering, Cornell University, USA","institution_ids":["https://openalex.org/I205783295"]},{"raw_affiliation_string":"Comput. Syst. Lab., Cornell Univ., Ithaca, NY, USA","institution_ids":["https://openalex.org/I205783295"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5002575415","display_name":"Rajit Manohar","orcid":"https://orcid.org/0000-0001-8211-6602"},"institutions":[{"id":"https://openalex.org/I205783295","display_name":"Cornell University","ror":"https://ror.org/05bnh6r87","country_code":"US","type":"education","lineage":["https://openalex.org/I205783295"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"R. Manohar","raw_affiliation_strings":["Comput. Syst. Lab., Cornell Univ., Ithaca, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Comput. Syst. Lab., Cornell Univ., Ithaca, NY, USA","institution_ids":["https://openalex.org/I205783295"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I205783295"],"apc_list":null,"apc_paid":null,"fwci":1.0477,"has_fulltext":false,"cited_by_count":12,"citation_normalized_percentile":{"value":0.76389749,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"75","last_page":"85"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/register-file","display_name":"Register file","score":0.8598791360855103},{"id":"https://openalex.org/keywords/datapath","display_name":"Datapath","score":0.841303825378418},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8286315202713013},{"id":"https://openalex.org/keywords/asynchronous-communication","display_name":"Asynchronous communication","score":0.6225653290748596},{"id":"https://openalex.org/keywords/register","display_name":"Register (sociolinguistics)","score":0.5769467949867249},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5233073234558105},{"id":"https://openalex.org/keywords/processor-register","display_name":"Processor register","score":0.48919013142585754},{"id":"https://openalex.org/keywords/energy-consumption","display_name":"Energy consumption","score":0.4702813923358917},{"id":"https://openalex.org/keywords/shift-register","display_name":"Shift register","score":0.4587121605873108},{"id":"https://openalex.org/keywords/energy","display_name":"Energy (signal processing)","score":0.43326032161712646},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.29201334714889526},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.25833332538604736},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.09199824929237366}],"concepts":[{"id":"https://openalex.org/C117280010","wikidata":"https://www.wikidata.org/wiki/Q180944","display_name":"Register file","level":3,"score":0.8598791360855103},{"id":"https://openalex.org/C2781198647","wikidata":"https://www.wikidata.org/wiki/Q1633673","display_name":"Datapath","level":2,"score":0.841303825378418},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8286315202713013},{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.6225653290748596},{"id":"https://openalex.org/C2779235478","wikidata":"https://www.wikidata.org/wiki/Q286576","display_name":"Register (sociolinguistics)","level":2,"score":0.5769467949867249},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5233073234558105},{"id":"https://openalex.org/C2871975","wikidata":"https://www.wikidata.org/wiki/Q187466","display_name":"Processor register","level":4,"score":0.48919013142585754},{"id":"https://openalex.org/C2780165032","wikidata":"https://www.wikidata.org/wiki/Q16869822","display_name":"Energy consumption","level":2,"score":0.4702813923358917},{"id":"https://openalex.org/C49654631","wikidata":"https://www.wikidata.org/wiki/Q746165","display_name":"Shift register","level":3,"score":0.4587121605873108},{"id":"https://openalex.org/C186370098","wikidata":"https://www.wikidata.org/wiki/Q442787","display_name":"Energy (signal processing)","level":2,"score":0.43326032161712646},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.29201334714889526},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.25833332538604736},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.09199824929237366},{"id":"https://openalex.org/C41895202","wikidata":"https://www.wikidata.org/wiki/Q8162","display_name":"Linguistics","level":1,"score":0.0},{"id":"https://openalex.org/C153247305","wikidata":"https://www.wikidata.org/wiki/Q835713","display_name":"Memory address","level":3,"score":0.0},{"id":"https://openalex.org/C18903297","wikidata":"https://www.wikidata.org/wiki/Q7150","display_name":"Ecology","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1109/async.2004.1299289","is_oa":false,"landing_page_url":"https://doi.org/10.1109/async.2004.1299289","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"10th International Symposium on Asynchronous Circuits and Systems, 2004. Proceedings.","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.4.6800","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.4.6800","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://vlsi.cornell.edu/~rajit/ps/reg.ps.gz","raw_type":"text"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.71.2705","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.71.2705","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://vlsi.cornell.edu/~rajit/ps/reg.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.9100000262260437,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":31,"referenced_works":["https://openalex.org/W16511050","https://openalex.org/W1537060762","https://openalex.org/W1540382676","https://openalex.org/W1546435617","https://openalex.org/W1935508356","https://openalex.org/W1957426159","https://openalex.org/W1976735509","https://openalex.org/W1985255904","https://openalex.org/W2078239989","https://openalex.org/W2089363288","https://openalex.org/W2104105510","https://openalex.org/W2115157620","https://openalex.org/W2119857683","https://openalex.org/W2120733705","https://openalex.org/W2123021615","https://openalex.org/W2130069661","https://openalex.org/W2136526569","https://openalex.org/W2137860371","https://openalex.org/W2138351227","https://openalex.org/W2141727318","https://openalex.org/W2144481293","https://openalex.org/W2148051985","https://openalex.org/W2151746018","https://openalex.org/W2154433299","https://openalex.org/W2156492002","https://openalex.org/W2159401133","https://openalex.org/W2225811560","https://openalex.org/W2504788735","https://openalex.org/W4241874262","https://openalex.org/W4245021564","https://openalex.org/W6682272006"],"related_works":["https://openalex.org/W2115178757","https://openalex.org/W2224192221","https://openalex.org/W1482836228","https://openalex.org/W2356166161","https://openalex.org/W1969937427","https://openalex.org/W4281749670","https://openalex.org/W2024145214","https://openalex.org/W2094874787","https://openalex.org/W3013048777","https://openalex.org/W2483419948"],"abstract_inverted_index":{"Register":[0],"files":[1,176],"of":[2,14,21,29,39,56,63,94,101,122,174],"microprocessors":[3],"have":[4],"often":[5],"been":[6],"cited":[7],"as":[8,46],"performance":[9,34,126],"bottlenecks":[10],"and":[11,18,35,73,85,128,141,150],"significant":[12,113,120],"consumers":[13],"energy.":[15],"The":[16,91],"robust":[17],"modular":[19],"nature":[20],"quasi-delay":[22],"insensitive":[23],"(QDI)":[24],"design":[25,55],"offers":[26],"a":[27,64,171],"toolchest":[28],"techniques":[30],"for":[31,170],"improving":[32],"average-case":[33],"reducing":[36],"energy":[37,114,143],"consumption":[38],"register":[40,59,65,108,132,175],"files,":[41,109],"which":[42,110],"cannot":[43],"be":[44],"leveraged":[45],"easily":[47],"in":[48,107,179],"synchronous":[49],"designs.":[50],"We":[51,67,166],"focus":[52],"on":[53],"the":[54,61,69,75,88,102,131,160],"an":[57],"asynchronous":[58],"core,":[60],"heart":[62],"file.":[66],"describe":[68,74],"vertical":[70],"pipelining":[71],"transformation":[72],"locking":[76],"mechanism":[77],"that":[78],"maintains":[79],"pipelined":[80],"mutual":[81],"exclusion":[82],"among":[83],"reads":[84],"writes":[86],"to":[87,112,134,138,145,153],"same":[89],"register.":[90],"primary":[92],"contributions":[93],"this":[95],"paper":[96],"are:":[97],"1)":[98],"detailed":[99],"evaluation":[100],"width-adaptive":[103],"datapath":[104],"(WAD)":[105],"representation":[106],"leads":[111],"reduction":[115],"by":[116],"conditionally":[117],"communicating":[118],"higher":[119],"bits":[121],"integers":[123],"with":[124],"little":[125],"degradation,":[127],"2)":[129],"nesting":[130],"core":[133],"create":[135],"non-uniform":[136],"banks":[137],"facilitate":[139],"faster":[140],"lower":[142],"accesses":[144,152],"more":[146],"frequently":[147,155],"used":[148,156],"registers":[149,157],"slower":[151],"less":[154],"without":[158],"increasing":[159],"interconnect":[161],"requirement":[162],"or":[163],"control":[164],"complexity.":[165],"present":[167],"spice-simulated":[168],"results":[169],"wide":[172],"variety":[173],"laid":[177],"out":[178],"TSMC":[180],"0.18/spl":[181],"mu/m":[182],"technology.":[183]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}