{"id":"https://openalex.org/W2906945597","doi":"https://doi.org/10.1109/asscc.2018.8579303","title":"A Fully Standard-Cell Based On-Chip BTI and HCI Monitor with 6.2x BTI sensitivity and 3.6x HCI sensitivity at 7 nm Fin-FET Process","display_name":"A Fully Standard-Cell Based On-Chip BTI and HCI Monitor with 6.2x BTI sensitivity and 3.6x HCI sensitivity at 7 nm Fin-FET Process","publication_year":2018,"publication_date":"2018-11-01","ids":{"openalex":"https://openalex.org/W2906945597","doi":"https://doi.org/10.1109/asscc.2018.8579303","mag":"2906945597"},"language":"en","primary_location":{"id":"doi:10.1109/asscc.2018.8579303","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asscc.2018.8579303","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 IEEE Asian Solid-State Circuits Conference (A-SSCC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5004949394","display_name":"Mitsuhiko Igarashi","orcid":"https://orcid.org/0000-0002-9350-0658"},"institutions":[{"id":"https://openalex.org/I4210153176","display_name":"Renesas Electronics (Japan)","ror":"https://ror.org/058wb7691","country_code":"JP","type":"company","lineage":["https://openalex.org/I4210153176"]}],"countries":["JP"],"is_corresponding":true,"raw_author_name":"Mitsuhiko Igarashi","raw_affiliation_strings":["Design Platform Business Dep., Renesas Electronics Corporation, Tokyo, Japan"],"affiliations":[{"raw_affiliation_string":"Design Platform Business Dep., Renesas Electronics Corporation, Tokyo, Japan","institution_ids":["https://openalex.org/I4210153176"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102314333","display_name":"Yuuki Uchida","orcid":null},"institutions":[{"id":"https://openalex.org/I4210153176","display_name":"Renesas Electronics (Japan)","ror":"https://ror.org/058wb7691","country_code":"JP","type":"company","lineage":["https://openalex.org/I4210153176"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Yuuki Uchida","raw_affiliation_strings":["Design Platform Business Dep., Renesas Electronics Corporation, Tokyo, Japan"],"affiliations":[{"raw_affiliation_string":"Design Platform Business Dep., Renesas Electronics Corporation, Tokyo, Japan","institution_ids":["https://openalex.org/I4210153176"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5000893005","display_name":"Yoshio Takazawa","orcid":null},"institutions":[{"id":"https://openalex.org/I4210153176","display_name":"Renesas Electronics (Japan)","ror":"https://ror.org/058wb7691","country_code":"JP","type":"company","lineage":["https://openalex.org/I4210153176"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Yoshio Takazawa","raw_affiliation_strings":["Design Platform Business Dep., Renesas Electronics Corporation, Tokyo, Japan"],"affiliations":[{"raw_affiliation_string":"Design Platform Business Dep., Renesas Electronics Corporation, Tokyo, Japan","institution_ids":["https://openalex.org/I4210153176"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5041951103","display_name":"Yasumasa Tsukamoto","orcid":"https://orcid.org/0000-0002-0963-6940"},"institutions":[{"id":"https://openalex.org/I4210153176","display_name":"Renesas Electronics (Japan)","ror":"https://ror.org/058wb7691","country_code":"JP","type":"company","lineage":["https://openalex.org/I4210153176"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Yasumasa Tsukamoto","raw_affiliation_strings":["Design Platform Business Dep., Renesas Electronics Corporation, Tokyo, Japan"],"affiliations":[{"raw_affiliation_string":"Design Platform Business Dep., Renesas Electronics Corporation, Tokyo, Japan","institution_ids":["https://openalex.org/I4210153176"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5043955916","display_name":"Koji Shibutani","orcid":null},"institutions":[{"id":"https://openalex.org/I4210153176","display_name":"Renesas Electronics (Japan)","ror":"https://ror.org/058wb7691","country_code":"JP","type":"company","lineage":["https://openalex.org/I4210153176"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Koji Shibutani","raw_affiliation_strings":["Design Platform Business Dep., Renesas Electronics Corporation, Tokyo, Japan"],"affiliations":[{"raw_affiliation_string":"Design Platform Business Dep., Renesas Electronics Corporation, Tokyo, Japan","institution_ids":["https://openalex.org/I4210153176"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5047952713","display_name":"Koji Nii","orcid":"https://orcid.org/0000-0002-9986-5308"},"institutions":[{"id":"https://openalex.org/I4210153176","display_name":"Renesas Electronics (Japan)","ror":"https://ror.org/058wb7691","country_code":"JP","type":"company","lineage":["https://openalex.org/I4210153176"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Koji Nii","raw_affiliation_strings":["Design Platform Business Dep., Renesas Electronics Corporation, Tokyo, Japan"],"affiliations":[{"raw_affiliation_string":"Design Platform Business Dep., Renesas Electronics Corporation, Tokyo, Japan","institution_ids":["https://openalex.org/I4210153176"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5004949394"],"corresponding_institution_ids":["https://openalex.org/I4210153176"],"apc_list":null,"apc_paid":null,"fwci":0.2575,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.59266704,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"195","last_page":"196"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/sensitivity","display_name":"Sensitivity (control systems)","score":0.7387921810150146},{"id":"https://openalex.org/keywords/reliability","display_name":"Reliability (semiconductor)","score":0.6533536911010742},{"id":"https://openalex.org/keywords/degradation","display_name":"Degradation (telecommunications)","score":0.6178268194198608},{"id":"https://openalex.org/keywords/waveform","display_name":"Waveform","score":0.6021061539649963},{"id":"https://openalex.org/keywords/negative-bias-temperature-instability","display_name":"Negative-bias temperature instability","score":0.5912050008773804},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.5733088850975037},{"id":"https://openalex.org/keywords/stress","display_name":"Stress (linguistics)","score":0.49257975816726685},{"id":"https://openalex.org/keywords/fin","display_name":"Fin","score":0.49254879355430603},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.48077768087387085},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4741617739200592},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.4510015845298767},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.4383925795555115},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.4249556064605713},{"id":"https://openalex.org/keywords/mosfet","display_name":"MOSFET","score":0.37036168575286865},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.33751097321510315},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3368796408176422},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.25376075506210327},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.21062788367271423},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.2039550244808197},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.11298713088035583},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.08224919438362122}],"concepts":[{"id":"https://openalex.org/C21200559","wikidata":"https://www.wikidata.org/wiki/Q7451068","display_name":"Sensitivity (control systems)","level":2,"score":0.7387921810150146},{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.6533536911010742},{"id":"https://openalex.org/C2779679103","wikidata":"https://www.wikidata.org/wiki/Q5251805","display_name":"Degradation (telecommunications)","level":2,"score":0.6178268194198608},{"id":"https://openalex.org/C197424946","wikidata":"https://www.wikidata.org/wiki/Q1165717","display_name":"Waveform","level":3,"score":0.6021061539649963},{"id":"https://openalex.org/C557185","wikidata":"https://www.wikidata.org/wiki/Q6987194","display_name":"Negative-bias temperature instability","level":5,"score":0.5912050008773804},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.5733088850975037},{"id":"https://openalex.org/C21036866","wikidata":"https://www.wikidata.org/wiki/Q181767","display_name":"Stress (linguistics)","level":2,"score":0.49257975816726685},{"id":"https://openalex.org/C91721477","wikidata":"https://www.wikidata.org/wiki/Q778612","display_name":"Fin","level":2,"score":0.49254879355430603},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.48077768087387085},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4741617739200592},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.4510015845298767},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.4383925795555115},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.4249556064605713},{"id":"https://openalex.org/C2778413303","wikidata":"https://www.wikidata.org/wiki/Q210793","display_name":"MOSFET","level":4,"score":0.37036168575286865},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.33751097321510315},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3368796408176422},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.25376075506210327},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.21062788367271423},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.2039550244808197},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.11298713088035583},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.08224919438362122},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C41895202","wikidata":"https://www.wikidata.org/wiki/Q8162","display_name":"Linguistics","level":1,"score":0.0},{"id":"https://openalex.org/C159985019","wikidata":"https://www.wikidata.org/wiki/Q181790","display_name":"Composite material","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/asscc.2018.8579303","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asscc.2018.8579303","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 IEEE Asian Solid-State Circuits Conference (A-SSCC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.4300000071525574,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W1974338211","https://openalex.org/W2032116786","https://openalex.org/W2112414127","https://openalex.org/W2295369751","https://openalex.org/W2584298940","https://openalex.org/W2779878421","https://openalex.org/W2786288697","https://openalex.org/W2800331910","https://openalex.org/W6658522862","https://openalex.org/W6748339866"],"related_works":["https://openalex.org/W1974895211","https://openalex.org/W2176409448","https://openalex.org/W2129841057","https://openalex.org/W3040712279","https://openalex.org/W2364769705","https://openalex.org/W2056136368","https://openalex.org/W2374664672","https://openalex.org/W2167195438","https://openalex.org/W2843479960","https://openalex.org/W1602382472"],"abstract_inverted_index":{"The":[0,22,104],"authors":[1],"propose":[2],"an":[3],"on-chip":[4],"NBTI,":[5],"PBTI":[6,68,72],"and":[7,32,65,149,162],"HCI":[8,81,83],"monitor":[9,24,73,135],"by":[10,88,95],"using":[11,96],"standard":[12],"cell":[13,39],"based":[14],"unbalanced":[15,97],"RO":[16,123],"at":[17,153],"7":[18,113],"nm":[19,114],"Fin-FET":[20,115],"process.":[21],"NBTI":[23,47,59],"consists":[25],"of":[26,41,92,101,107,121,151,155,165],"two":[27],"ROs;":[28],"one":[29],"is":[30,35,53,74,85,124],"NBTIRO":[31],"the":[33,128],"other":[34,51],"R-NBTI-RO":[36,43],"with":[37,62],"reversed":[38],"order":[40],"NBTI-RO.":[42],"gets":[44],"fast":[45],"after":[46],"stress":[48],"where":[49],"as":[50],"ROs":[52],"degraded.":[54],"As":[55],"a":[56,77,138,145],"result,":[57],"6.2x":[58],"sensitivity":[60,69],"compared":[61],"normal":[63],"INV-RO":[64],"negligibly":[66],"small":[67],"are":[70],"achieved.":[71],"achieved":[75],"in":[76,112,144],"similar":[78],"manner.":[79],"In":[80],"monitor,":[82],"degradation":[84],"3.6x":[86],"emphasized":[87],"simulating":[89],"worst-case":[90],"waveform":[91],"logic":[93],"circuit":[94],"drive":[98],"strength":[99],"configuration":[100],"INV":[102],"cell.":[103],"measurement":[105],"result":[106,120],"our":[108],"test":[109],"chip":[110],"fabricated":[111],"process":[116],"shows":[117],"that":[118],"measured":[119],"each":[122],"well":[125],"matched":[126],"to":[127,140,157],"simulation":[129],"one.":[130],"These":[131],"high":[132,160,163],"sensitive":[133],"NBTI/PBTI/HCI":[134],"can":[136],"be":[137],"solution":[139],"optimize":[141],"required":[142],"GB":[143],"field,":[146],"detect":[147],"variations":[148],"outliers":[150],"aging":[152],"time":[154],"testing":[156],"achieve":[158],"both":[159],"performance":[161],"reliability":[164],"autonomous":[166],"driving":[167],"LSI.":[168]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2019,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}