{"id":"https://openalex.org/W4246320443","doi":"https://doi.org/10.1109/aspdac.2018.8297344","title":"A 2.4pJ/bit, 6.37Gb/s SPC-enhanced BC-BCH decoder in 65nm CMOS for NAND flash storage systems","display_name":"A 2.4pJ/bit, 6.37Gb/s SPC-enhanced BC-BCH decoder in 65nm CMOS for NAND flash storage systems","publication_year":2018,"publication_date":"2018-01-01","ids":{"openalex":"https://openalex.org/W4246320443","doi":"https://doi.org/10.1109/aspdac.2018.8297344"},"language":"en","primary_location":{"id":"doi:10.1109/aspdac.2018.8297344","is_oa":false,"landing_page_url":"https://doi.org/10.1109/aspdac.2018.8297344","pdf_url":null,"source":{"id":"https://openalex.org/S4363608266","display_name":"2018 23rd Asia and South Pacific Design Automation Conference (ASP-DAC)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 23rd Asia and South Pacific Design Automation Conference (ASP-DAC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5102005147","display_name":"Jaehwan Jung","orcid":"https://orcid.org/0000-0003-3997-5449"},"institutions":[{"id":"https://openalex.org/I157485424","display_name":"Korea Advanced Institute of Science and Technology","ror":"https://ror.org/05apxxy63","country_code":"KR","type":"education","lineage":["https://openalex.org/I157485424"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Jaehwan Jung","raw_affiliation_strings":["School of Electrical Engineering, KAIST, Daejeon, Republic of Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical Engineering, KAIST, Daejeon, Republic of Korea","institution_ids":["https://openalex.org/I157485424"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5087977408","display_name":"In\u2010Cheol Park","orcid":"https://orcid.org/0000-0003-3524-2838"},"institutions":[{"id":"https://openalex.org/I157485424","display_name":"Korea Advanced Institute of Science and Technology","ror":"https://ror.org/05apxxy63","country_code":"KR","type":"education","lineage":["https://openalex.org/I157485424"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"In-Cheol Park","raw_affiliation_strings":["School of Electrical Engineering, KAIST, Daejeon, Republic of Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical Engineering, KAIST, Daejeon, Republic of Korea","institution_ids":["https://openalex.org/I157485424"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5048891431","display_name":"Youngjoo Lee","orcid":"https://orcid.org/0000-0002-2467-8276"},"institutions":[{"id":"https://openalex.org/I123900574","display_name":"Pohang University of Science and Technology","ror":"https://ror.org/04xysgw12","country_code":"KR","type":"education","lineage":["https://openalex.org/I123900574"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Youngjoo Lee","raw_affiliation_strings":["Department of Electrical Engineering, POSTECH, Pohang, Republic of Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, POSTECH, Pohang, Republic of Korea","institution_ids":["https://openalex.org/I123900574"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.2703,"has_fulltext":false,"cited_by_count":8,"citation_normalized_percentile":{"value":0.82034632,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"329","last_page":"330"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11321","display_name":"Error Correcting Code Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11130","display_name":"Coding theory and cryptography","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/bch-code","display_name":"BCH code","score":0.9131757020950317},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7416199445724487},{"id":"https://openalex.org/keywords/decoding-methods","display_name":"Decoding methods","score":0.6991089582443237},{"id":"https://openalex.org/keywords/soft-decision-decoder","display_name":"Soft-decision decoder","score":0.5675684809684753},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5574430227279663},{"id":"https://openalex.org/keywords/nand-gate","display_name":"NAND gate","score":0.5338818430900574},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4625481963157654},{"id":"https://openalex.org/keywords/flash","display_name":"Flash (photography)","score":0.44894787669181824},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.4183058738708496},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.40809062123298645},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.34872767329216003},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.24876990914344788},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.23574474453926086},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.22602063417434692},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.15289103984832764},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.11063709855079651}],"concepts":[{"id":"https://openalex.org/C42276685","wikidata":"https://www.wikidata.org/wiki/Q795705","display_name":"BCH code","level":3,"score":0.9131757020950317},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7416199445724487},{"id":"https://openalex.org/C57273362","wikidata":"https://www.wikidata.org/wiki/Q576722","display_name":"Decoding methods","level":2,"score":0.6991089582443237},{"id":"https://openalex.org/C185588885","wikidata":"https://www.wikidata.org/wiki/Q7553811","display_name":"Soft-decision decoder","level":3,"score":0.5675684809684753},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5574430227279663},{"id":"https://openalex.org/C124296912","wikidata":"https://www.wikidata.org/wiki/Q575178","display_name":"NAND gate","level":3,"score":0.5338818430900574},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4625481963157654},{"id":"https://openalex.org/C2777526259","wikidata":"https://www.wikidata.org/wiki/Q221836","display_name":"Flash (photography)","level":2,"score":0.44894787669181824},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.4183058738708496},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.40809062123298645},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.34872767329216003},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.24876990914344788},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.23574474453926086},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.22602063417434692},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.15289103984832764},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.11063709855079651},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/aspdac.2018.8297344","is_oa":false,"landing_page_url":"https://doi.org/10.1109/aspdac.2018.8297344","pdf_url":null,"source":{"id":"https://openalex.org/S4363608266","display_name":"2018 23rd Asia and South Pacific Design Automation Conference (ASP-DAC)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 23rd Asia and South Pacific Design Automation Conference (ASP-DAC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8299999833106995,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W1968013032","https://openalex.org/W2033828908","https://openalex.org/W2051888055","https://openalex.org/W2125099110","https://openalex.org/W2166538764","https://openalex.org/W2266506104","https://openalex.org/W6658685447"],"related_works":["https://openalex.org/W1995527419","https://openalex.org/W1976834495","https://openalex.org/W4242597560","https://openalex.org/W2521769401","https://openalex.org/W2054139911","https://openalex.org/W1577524679","https://openalex.org/W1974357939","https://openalex.org/W3144457048","https://openalex.org/W2162027152","https://openalex.org/W2052237030"],"abstract_inverted_index":{"This":[0],"paper":[1],"present":[2],"an":[3,25,85],"energy-efficient":[4],"block-concatenated":[5],"BCH":[6],"(BC-BCH)":[7],"decoder":[8,77],"which":[9],"can":[10],"achieve":[11],"superior":[12,90],"decoding":[13,27,53,80],"performance":[14],"for":[15,96],"NAND":[16],"flash":[17],"storage":[18],"systems.":[19],"To":[20],"enhance":[21],"the":[22,46,52,56,92],"error-correcting":[23],"capability,":[24],"additional":[26],"step":[28],"with":[29],"single":[30],"parity-check":[31],"(SPC)":[32],"block":[33],"is":[34,62],"newly":[35],"employed.":[36],"A":[37],"novel":[38],"memory":[39],"based":[40],"syndrome":[41],"updating":[42],"method":[43],"effectively":[44],"improves":[45],"energy":[47],"efficiency":[48,86],"as":[49,51],"well":[50],"latency.":[54],"Using":[55],"proposed":[57,76],"methods,":[58],"a":[59,66,79],"prototype":[60],"chip":[61],"implemented":[63],"to":[64,91],"decode":[65],"(36443,":[67],"32768)":[68],"BC-BCH":[69],"code":[70],"in":[71],"65nm":[72],"CMOS":[73],"process.":[74],"The":[75],"provides":[78],"throughput":[81],"of":[82,87],"6.37Gb/s":[83],"and":[84],"2.4pJ/bit,":[88],"being":[89],"state-of-the-art":[93],"hard-decision":[94],"decoders":[95],"storages.":[97]},"counts_by_year":[{"year":2024,"cited_by_count":2},{"year":2022,"cited_by_count":2},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":2}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
