{"id":"https://openalex.org/W4245628811","doi":"https://doi.org/10.1109/aspdac.2018.8297328","title":"A 300-pW audio \u0391\u03a3 modulator with 100.5-dB DR using dynamic bias inverter","display_name":"A 300-pW audio \u0391\u03a3 modulator with 100.5-dB DR using dynamic bias inverter","publication_year":2018,"publication_date":"2018-01-01","ids":{"openalex":"https://openalex.org/W4245628811","doi":"https://doi.org/10.1109/aspdac.2018.8297328"},"language":"en","primary_location":{"id":"doi:10.1109/aspdac.2018.8297328","is_oa":false,"landing_page_url":"https://doi.org/10.1109/aspdac.2018.8297328","pdf_url":null,"source":{"id":"https://openalex.org/S4363608266","display_name":"2018 23rd Asia and South Pacific Design Automation Conference (ASP-DAC)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 23rd Asia and South Pacific Design Automation Conference (ASP-DAC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100436196","display_name":"Sangwoo Lee","orcid":"https://orcid.org/0000-0003-3589-3876"},"institutions":[{"id":"https://openalex.org/I193775966","display_name":"Yonsei University","ror":"https://ror.org/01wjejq96","country_code":"KR","type":"education","lineage":["https://openalex.org/I193775966"]}],"countries":["KR"],"is_corresponding":true,"raw_author_name":"Sangwoo Lee","raw_affiliation_strings":["Department of Electrical &amp; Electronic Engineering, Yonsei University, Korea Yonsei-ro 50, Seoul, 03722, Korea","Department of Electrical & Electronic Engineering, Yonsei University, Seoul, Korea"],"affiliations":[{"raw_affiliation_string":"Department of Electrical &amp; Electronic Engineering, Yonsei University, Korea Yonsei-ro 50, Seoul, 03722, Korea","institution_ids":["https://openalex.org/I193775966"]},{"raw_affiliation_string":"Department of Electrical & Electronic Engineering, Yonsei University, Seoul, Korea","institution_ids":["https://openalex.org/I193775966"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5006288473","display_name":"Woojin Jo","orcid":"https://orcid.org/0000-0002-0285-3176"},"institutions":[{"id":"https://openalex.org/I193775966","display_name":"Yonsei University","ror":"https://ror.org/01wjejq96","country_code":"KR","type":"education","lineage":["https://openalex.org/I193775966"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Woojin Jo","raw_affiliation_strings":["Department of Electrical &amp; Electronic Engineering, Yonsei University, Korea Yonsei-ro 50, Seoul, 03722, Korea","Department of Electrical & Electronic Engineering, Yonsei University, Seoul, Korea"],"affiliations":[{"raw_affiliation_string":"Department of Electrical &amp; Electronic Engineering, Yonsei University, Korea Yonsei-ro 50, Seoul, 03722, Korea","institution_ids":["https://openalex.org/I193775966"]},{"raw_affiliation_string":"Department of Electrical & Electronic Engineering, Yonsei University, Seoul, Korea","institution_ids":["https://openalex.org/I193775966"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5072706323","display_name":"Seungwoo Song","orcid":"https://orcid.org/0000-0003-3302-0553"},"institutions":[{"id":"https://openalex.org/I193775966","display_name":"Yonsei University","ror":"https://ror.org/01wjejq96","country_code":"KR","type":"education","lineage":["https://openalex.org/I193775966"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Seungwoo Song","raw_affiliation_strings":["Department of Electrical &amp; Electronic Engineering, Yonsei University, Korea Yonsei-ro 50, Seoul, 03722, Korea","Department of Electrical & Electronic Engineering, Yonsei University, Seoul, Korea"],"affiliations":[{"raw_affiliation_string":"Department of Electrical &amp; Electronic Engineering, Yonsei University, Korea Yonsei-ro 50, Seoul, 03722, Korea","institution_ids":["https://openalex.org/I193775966"]},{"raw_affiliation_string":"Department of Electrical & Electronic Engineering, Yonsei University, Seoul, Korea","institution_ids":["https://openalex.org/I193775966"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5088759343","display_name":"Youngcheol Chae","orcid":"https://orcid.org/0000-0002-1618-169X"},"institutions":[{"id":"https://openalex.org/I193775966","display_name":"Yonsei University","ror":"https://ror.org/01wjejq96","country_code":"KR","type":"education","lineage":["https://openalex.org/I193775966"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Youngcheol Chae","raw_affiliation_strings":["Department of Electrical &amp; Electronic Engineering, Yonsei University, Korea Yonsei-ro 50, Seoul, 03722, Korea","Department of Electrical & Electronic Engineering, Yonsei University, Seoul, Korea"],"affiliations":[{"raw_affiliation_string":"Department of Electrical &amp; Electronic Engineering, Yonsei University, Korea Yonsei-ro 50, Seoul, 03722, Korea","institution_ids":["https://openalex.org/I193775966"]},{"raw_affiliation_string":"Department of Electrical & Electronic Engineering, Yonsei University, Seoul, Korea","institution_ids":["https://openalex.org/I193775966"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5100436196"],"corresponding_institution_ids":["https://openalex.org/I193775966"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.51422764,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"297","last_page":"298"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9923999905586243,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10175","display_name":"Advanced DC-DC Converters","score":0.9851999878883362,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/spurious-free-dynamic-range","display_name":"Spurious-free dynamic range","score":0.7450010776519775},{"id":"https://openalex.org/keywords/delta-sigma-modulation","display_name":"Delta-sigma modulation","score":0.6678850650787354},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4930374324321747},{"id":"https://openalex.org/keywords/inverter","display_name":"Inverter","score":0.4493674039840698},{"id":"https://openalex.org/keywords/integrator","display_name":"Integrator","score":0.41465461254119873},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.402035117149353},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.40123867988586426},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.3711473345756531},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3440389335155487},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2276419997215271},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.18154773116111755},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.17598170042037964}],"concepts":[{"id":"https://openalex.org/C119293636","wikidata":"https://www.wikidata.org/wiki/Q657480","display_name":"Spurious-free dynamic range","level":3,"score":0.7450010776519775},{"id":"https://openalex.org/C68754193","wikidata":"https://www.wikidata.org/wiki/Q1184820","display_name":"Delta-sigma modulation","level":3,"score":0.6678850650787354},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4930374324321747},{"id":"https://openalex.org/C11190779","wikidata":"https://www.wikidata.org/wiki/Q664575","display_name":"Inverter","level":3,"score":0.4493674039840698},{"id":"https://openalex.org/C79518650","wikidata":"https://www.wikidata.org/wiki/Q2081431","display_name":"Integrator","level":3,"score":0.41465461254119873},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.402035117149353},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.40123867988586426},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.3711473345756531},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3440389335155487},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2276419997215271},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.18154773116111755},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.17598170042037964},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/aspdac.2018.8297328","is_oa":false,"landing_page_url":"https://doi.org/10.1109/aspdac.2018.8297328","pdf_url":null,"source":{"id":"https://openalex.org/S4363608266","display_name":"2018 23rd Asia and South Pacific Design Automation Conference (ASP-DAC)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 23rd Asia and South Pacific Design Automation Conference (ASP-DAC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.7900000214576721}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W2128664218","https://openalex.org/W1976391040","https://openalex.org/W2157118673","https://openalex.org/W2124911477","https://openalex.org/W98453623","https://openalex.org/W2913428688","https://openalex.org/W3097708393","https://openalex.org/W2340624421","https://openalex.org/W2016777110","https://openalex.org/W2102815341"],"abstract_inverted_index":{"A":[0,37],"micropower":[1],"audio":[2,66],"delta-sigma":[3],"modulator":[4,11,39,52],"is":[5],"presented":[6],"for":[7],"mobile":[8],"applications.":[9],"The":[10,51],"employs":[12],"dynamic":[13],"bias":[14],"inverter":[15],"based":[16],"integrators,":[17],"which":[18],"maximizes":[19],"both":[20],"g":[21],"<sub":[22,26],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[23,27],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">m</sub>":[24],"/I":[25],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">D</sub>":[28],"ratio":[29],"and":[30,60],"slew":[31],"rate":[32],"while":[33,68],"compensating":[34],"PVT":[35],"variations.":[36],"prototype":[38],"implemented":[40],"in":[41,63],"a":[42,47,64,73,79],"0.18pm":[43],"CMOS":[44],"process":[45],"features":[46],"single-bit":[48],"third-order":[49],"topology.":[50],"achieves":[53],"97.7dB":[54],"SNDR,":[55],"98.6dB":[56],"SNR,":[57],"100.5dB":[58],"DR,":[59],"105.8dB":[61],"SFDR":[62],"20kHz":[65],"band,":[67],"consuming":[69],"only":[70],"300pW":[71],"from":[72],"1.8V":[74],"supply.":[75],"This":[76],"corresponds":[77],"to":[78],"state-of-the-art":[80],"FoM":[81],"of":[82],"178.7dB.":[83]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}