{"id":"https://openalex.org/W2588628414","doi":"https://doi.org/10.1109/aspdac.2017.7858325","title":"Virtual prototyping of smart systems through automatic abstraction and mixed-signal scheduling","display_name":"Virtual prototyping of smart systems through automatic abstraction and mixed-signal scheduling","publication_year":2017,"publication_date":"2017-01-01","ids":{"openalex":"https://openalex.org/W2588628414","doi":"https://doi.org/10.1109/aspdac.2017.7858325","mag":"2588628414"},"language":"en","primary_location":{"id":"doi:10.1109/aspdac.2017.7858325","is_oa":false,"landing_page_url":"https://doi.org/10.1109/aspdac.2017.7858325","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 22nd Asia and South Pacific Design Automation Conference (ASP-DAC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5069672683","display_name":"Michele Lora","orcid":"https://orcid.org/0000-0002-6224-4313"},"institutions":[{"id":"https://openalex.org/I119439378","display_name":"University of Verona","ror":"https://ror.org/039bp8j42","country_code":"IT","type":"education","lineage":["https://openalex.org/I119439378"]}],"countries":["IT"],"is_corresponding":true,"raw_author_name":"Michele Lora","raw_affiliation_strings":["Department of Computer Science, University of Verona, Italy"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science, University of Verona, Italy","institution_ids":["https://openalex.org/I119439378"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5068919830","display_name":"Enrico Fraccaroli","orcid":"https://orcid.org/0000-0002-9739-6501"},"institutions":[{"id":"https://openalex.org/I119439378","display_name":"University of Verona","ror":"https://ror.org/039bp8j42","country_code":"IT","type":"education","lineage":["https://openalex.org/I119439378"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Enrico Fraccaroli","raw_affiliation_strings":["Department of Computer Science, University of Verona, Italy"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science, University of Verona, Italy","institution_ids":["https://openalex.org/I119439378"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5040302302","display_name":"Franco Fummi","orcid":"https://orcid.org/0000-0002-4404-5791"},"institutions":[{"id":"https://openalex.org/I119439378","display_name":"University of Verona","ror":"https://ror.org/039bp8j42","country_code":"IT","type":"education","lineage":["https://openalex.org/I119439378"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Franco Fummi","raw_affiliation_strings":["Department of Computer Science, University of Verona, Italy"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science, University of Verona, Italy","institution_ids":["https://openalex.org/I119439378"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5069672683"],"corresponding_institution_ids":["https://openalex.org/I119439378"],"apc_list":null,"apc_paid":null,"fwci":1.1266,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":{"value":0.77485415,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"232","last_page":"237"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.998199999332428,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9958999752998352,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.810253918170929},{"id":"https://openalex.org/keywords/virtual-prototyping","display_name":"Virtual prototyping","score":0.6415023803710938},{"id":"https://openalex.org/keywords/synchronization","display_name":"Synchronization (alternating current)","score":0.5921927094459534},{"id":"https://openalex.org/keywords/scheduling","display_name":"Scheduling (production processes)","score":0.55596923828125},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5366586446762085},{"id":"https://openalex.org/keywords/abstraction","display_name":"Abstraction","score":0.4961424767971039},{"id":"https://openalex.org/keywords/exploit","display_name":"Exploit","score":0.45399317145347595},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.34108978509902954},{"id":"https://openalex.org/keywords/real-time-computing","display_name":"Real-time computing","score":0.3367024064064026},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.33045071363449097},{"id":"https://openalex.org/keywords/simulation","display_name":"Simulation","score":0.19786673784255981},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.09402608871459961}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.810253918170929},{"id":"https://openalex.org/C2780991453","wikidata":"https://www.wikidata.org/wiki/Q3408177","display_name":"Virtual prototyping","level":2,"score":0.6415023803710938},{"id":"https://openalex.org/C2778562939","wikidata":"https://www.wikidata.org/wiki/Q1298791","display_name":"Synchronization (alternating current)","level":3,"score":0.5921927094459534},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.55596923828125},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5366586446762085},{"id":"https://openalex.org/C124304363","wikidata":"https://www.wikidata.org/wiki/Q673661","display_name":"Abstraction","level":2,"score":0.4961424767971039},{"id":"https://openalex.org/C165696696","wikidata":"https://www.wikidata.org/wiki/Q11287","display_name":"Exploit","level":2,"score":0.45399317145347595},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.34108978509902954},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.3367024064064026},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.33045071363449097},{"id":"https://openalex.org/C44154836","wikidata":"https://www.wikidata.org/wiki/Q45045","display_name":"Simulation","level":1,"score":0.19786673784255981},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.09402608871459961},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0},{"id":"https://openalex.org/C111472728","wikidata":"https://www.wikidata.org/wiki/Q9471","display_name":"Epistemology","level":1,"score":0.0},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/aspdac.2017.7858325","is_oa":false,"landing_page_url":"https://doi.org/10.1109/aspdac.2017.7858325","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 22nd Asia and South Pacific Design Automation Conference (ASP-DAC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W2013523126","https://openalex.org/W2031725584","https://openalex.org/W2061217545","https://openalex.org/W2066990919","https://openalex.org/W2104520397","https://openalex.org/W2254450385","https://openalex.org/W2342887478","https://openalex.org/W2374787370","https://openalex.org/W2489854111","https://openalex.org/W2537393099","https://openalex.org/W2622072046","https://openalex.org/W2793366120","https://openalex.org/W3151432910","https://openalex.org/W6704332144","https://openalex.org/W6749921928"],"related_works":["https://openalex.org/W17155033","https://openalex.org/W3207760230","https://openalex.org/W1496222301","https://openalex.org/W4312814274","https://openalex.org/W1590307681","https://openalex.org/W2536018345","https://openalex.org/W4285370786","https://openalex.org/W2296488620","https://openalex.org/W2358353312","https://openalex.org/W2353836703"],"abstract_inverted_index":{"Modern":[0],"smart":[1,34],"systems":[2],"are":[3,90],"usually":[4],"built":[5],"by":[6,37,50,72,115],"implementing":[7],"SW":[8],"functionalities":[9],"executed":[10],"on":[11],"HW":[12],"platforms":[13],"composed":[14],"of":[15,27,31,111,135],"both":[16],"digital":[17,74,136],"and":[18,60,75,123,133,137],"analog":[19,76,98,138],"components.":[20],"Validation":[21],"is":[22,42],"mainly":[23],"implemented":[24],"through":[25],"simulation":[26,49,119],"the":[28,32,104,108,112],"functional":[29,109],"behavior":[30,110],"entire":[33,113],"system":[35],"modeled":[36],"a":[38,66,79,125,145],"Virtual":[39],"Platform.":[40],"It":[41],"thus":[43],"crucial":[44],"to":[45,55,68,101,120,140],"achieve":[46],"fast":[47],"mixed-signal":[48,70],"removing":[51],"unnecessary":[52],"overhead":[53],"due":[54],"synchronization":[56,134],"between":[57],"multiple":[58],"tools":[59],"unimportant":[61],"details.":[62],"This":[63],"work":[64],"proposes":[65],"methodology":[67],"abstract":[69],"systems,":[71],"integrating":[73],"components":[77],"in":[78,144],"homogeneous":[80,146],"virtual":[81],"platform":[82,114],"model":[83],"for":[84,97,107],"efficient":[85],"simulation.":[86],"Two":[87],"main":[88],"contributions":[89],"provided:":[91],"1)":[92],"an":[93],"automatic":[94],"abstraction":[95],"technique":[96,128],"components,":[99],"allowing":[100],"preserve":[102],"only":[103],"details":[105],"meaningful":[106],"moving":[116],"complexity":[117],"from":[118],"generation":[121],"time":[122],"2)":[124],"novel":[126],"scheduling":[127],"that":[129],"exploits":[130],"temporal":[131],"decoupling":[132],"processes,":[139],"simulate":[141],"them":[142],"together":[143],"model.":[147]},"counts_by_year":[{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":2},{"year":2017,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
