{"id":"https://openalex.org/W1979651501","doi":"https://doi.org/10.1109/aspdac.2015.7059045","title":"Accelerating non-volatile/hybrid processor cache design space exploration for application specific embedded systems","display_name":"Accelerating non-volatile/hybrid processor cache design space exploration for application specific embedded systems","publication_year":2015,"publication_date":"2015-01-01","ids":{"openalex":"https://openalex.org/W1979651501","doi":"https://doi.org/10.1109/aspdac.2015.7059045","mag":"1979651501"},"language":"en","primary_location":{"id":"doi:10.1109/aspdac.2015.7059045","is_oa":false,"landing_page_url":"http://doi.org/10.1109/aspdac.2015.7059045","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"The 20th Asia and South Pacific Design Automation Conference","raw_type":"proceedings-article"},"type":"preprint","indexed_in":["arxiv","crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://arxiv.org/pdf/1506.03193","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5036263624","display_name":"Mohammad Shihabul Haque","orcid":"https://orcid.org/0000-0002-5977-8533"},"institutions":[{"id":"https://openalex.org/I165932596","display_name":"National University of Singapore","ror":"https://ror.org/01tgyzw49","country_code":"SG","type":"education","lineage":["https://openalex.org/I165932596"]}],"countries":["SG"],"is_corresponding":true,"raw_author_name":"Mohammad Shihabul Haque","raw_affiliation_strings":["Nat. Univ. of Singapore, Singapore"],"affiliations":[{"raw_affiliation_string":"Nat. Univ. of Singapore, Singapore","institution_ids":["https://openalex.org/I165932596"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100413624","display_name":"Ang Li","orcid":"https://orcid.org/0000-0002-7458-063X"},"institutions":[{"id":"https://openalex.org/I165932596","display_name":"National University of Singapore","ror":"https://ror.org/01tgyzw49","country_code":"SG","type":"education","lineage":["https://openalex.org/I165932596"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Ang Li","raw_affiliation_strings":["Nat. Univ. of Singapore, Singapore"],"affiliations":[{"raw_affiliation_string":"Nat. Univ. of Singapore, Singapore","institution_ids":["https://openalex.org/I165932596"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100755285","display_name":"Akash Kumar","orcid":"https://orcid.org/0000-0001-7125-1737"},"institutions":[{"id":"https://openalex.org/I165932596","display_name":"National University of Singapore","ror":"https://ror.org/01tgyzw49","country_code":"SG","type":"education","lineage":["https://openalex.org/I165932596"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Akash Kumar","raw_affiliation_strings":["Nat. Univ. of Singapore, Singapore"],"affiliations":[{"raw_affiliation_string":"Nat. Univ. of Singapore, Singapore","institution_ids":["https://openalex.org/I165932596"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5113500906","display_name":"Qingsong Wei","orcid":null},"institutions":[{"id":"https://openalex.org/I144291393","display_name":"Data Storage Institute","ror":"https://ror.org/03k5xes38","country_code":"SG","type":"facility","lineage":["https://openalex.org/I115228651","https://openalex.org/I144291393"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Qingsong Wei","raw_affiliation_strings":["Data Storage Institute (DSI) Singapore, Singapore"],"affiliations":[{"raw_affiliation_string":"Data Storage Institute (DSI) Singapore, Singapore","institution_ids":["https://openalex.org/I144291393"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5036263624"],"corresponding_institution_ids":["https://openalex.org/I165932596"],"apc_list":null,"apc_paid":null,"fwci":0.3318,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.59518198,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":"18","issue":null,"first_page":"435","last_page":"440"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7568621039390564},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.6391390562057495},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6033810377120972},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5176470875740051},{"id":"https://openalex.org/keywords/design-space-exploration","display_name":"Design space exploration","score":0.512276828289032},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.45057493448257446},{"id":"https://openalex.org/keywords/space","display_name":"Space (punctuation)","score":0.41812416911125183},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3527052402496338},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.24985527992248535}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7568621039390564},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.6391390562057495},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6033810377120972},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5176470875740051},{"id":"https://openalex.org/C2776221188","wikidata":"https://www.wikidata.org/wiki/Q21072556","display_name":"Design space exploration","level":2,"score":0.512276828289032},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.45057493448257446},{"id":"https://openalex.org/C2778572836","wikidata":"https://www.wikidata.org/wiki/Q380933","display_name":"Space (punctuation)","level":2,"score":0.41812416911125183},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3527052402496338},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.24985527992248535}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/aspdac.2015.7059045","is_oa":false,"landing_page_url":"http://doi.org/10.1109/aspdac.2015.7059045","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"The 20th Asia and South Pacific Design Automation Conference","raw_type":"proceedings-article"},{"id":"pmh:oai:arXiv.org:1506.03193","is_oa":true,"landing_page_url":"http://arxiv.org/abs/1506.03193","pdf_url":"https://arxiv.org/pdf/1506.03193","source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"text"}],"best_oa_location":{"id":"pmh:oai:arXiv.org:1506.03193","is_oa":true,"landing_page_url":"http://arxiv.org/abs/1506.03193","pdf_url":"https://arxiv.org/pdf/1506.03193","source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"text"},"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":38,"referenced_works":["https://openalex.org/W1907628529","https://openalex.org/W1985264830","https://openalex.org/W1985573567","https://openalex.org/W1986546446","https://openalex.org/W1989725425","https://openalex.org/W1992763756","https://openalex.org/W1995038282","https://openalex.org/W2010202670","https://openalex.org/W2020020869","https://openalex.org/W2032142237","https://openalex.org/W2033380306","https://openalex.org/W2047379549","https://openalex.org/W2052993280","https://openalex.org/W2061075966","https://openalex.org/W2068651594","https://openalex.org/W2079555365","https://openalex.org/W2088775661","https://openalex.org/W2090590416","https://openalex.org/W2099856791","https://openalex.org/W2102449048","https://openalex.org/W2105440885","https://openalex.org/W2121191383","https://openalex.org/W2135393827","https://openalex.org/W2150073849","https://openalex.org/W2157761704","https://openalex.org/W2159389783","https://openalex.org/W2168972302","https://openalex.org/W2185884025","https://openalex.org/W2998915116","https://openalex.org/W2999811406","https://openalex.org/W3015113183","https://openalex.org/W3144303468","https://openalex.org/W3146625396","https://openalex.org/W3148137708","https://openalex.org/W4233019318","https://openalex.org/W4238962724","https://openalex.org/W4240163901","https://openalex.org/W6648639277"],"related_works":["https://openalex.org/W2111062328","https://openalex.org/W2133682266","https://openalex.org/W2497617944","https://openalex.org/W2167303720","https://openalex.org/W1563139915","https://openalex.org/W2108386578","https://openalex.org/W2109715593","https://openalex.org/W2061075966","https://openalex.org/W3147501184","https://openalex.org/W2268996566"],"abstract_inverted_index":{"In":[0],"this":[1],"article,":[2],"we":[3],"propose":[4],"a":[5,27,34],"technique":[6,43],"to":[7,61,65],"accelerate":[8,45],"nonvolatile":[9,15],"or":[10,47],"hybrid":[11,48],"of":[12],"volatile":[13],"and":[14,33],"processor":[16,50],"cache":[17,29,37,51],"design":[18,52],"space":[19,53],"exploration":[20,54],"for":[21,55],"application":[22],"specific":[23],"embedded":[24],"systems.":[25],"Utilizing":[26],"novel":[28],"behavior":[30],"modeling":[31],"equation":[32],"new":[35],"accurate":[36],"miss":[38],"prediction":[39],"mechanism,":[40],"our":[41],"proposed":[42],"can":[44],"NVM":[46],"FIFO":[49],"SPEC":[56],"CPU":[57],"2000":[58],"applications":[59],"up":[60],"249":[62],"times":[63],"compared":[64],"the":[66],"conventional":[67],"approach.":[68]},"counts_by_year":[{"year":2019,"cited_by_count":2},{"year":2017,"cited_by_count":1}],"updated_date":"2026-03-20T23:20:44.827607","created_date":"2025-10-10T00:00:00"}