{"id":"https://openalex.org/W1965063254","doi":"https://doi.org/10.1109/aspdac.2014.6742958","title":"A coherent hybrid SRAM and STT-RAM L1 cache architecture for shared memory multicores","display_name":"A coherent hybrid SRAM and STT-RAM L1 cache architecture for shared memory multicores","publication_year":2014,"publication_date":"2014-01-01","ids":{"openalex":"https://openalex.org/W1965063254","doi":"https://doi.org/10.1109/aspdac.2014.6742958","mag":"1965063254"},"language":"en","primary_location":{"id":"doi:10.1109/aspdac.2014.6742958","is_oa":false,"landing_page_url":"https://doi.org/10.1109/aspdac.2014.6742958","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 19th Asia and South Pacific Design Automation Conference (ASP-DAC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100438360","display_name":"Jianxin Wang","orcid":"https://orcid.org/0000-0003-1516-0480"},"institutions":[{"id":"https://openalex.org/I165932596","display_name":"National University of Singapore","ror":"https://ror.org/01tgyzw49","country_code":"SG","type":"education","lineage":["https://openalex.org/I165932596"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Jianxing Wang","raw_affiliation_strings":["School of Computing, National University of Singapore, Singapore, 117417"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Computing, National University of Singapore, Singapore, 117417","institution_ids":["https://openalex.org/I165932596"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5088693892","display_name":"Yenni Tim","orcid":"https://orcid.org/0000-0002-1574-3654"},"institutions":[{"id":"https://openalex.org/I165932596","display_name":"National University of Singapore","ror":"https://ror.org/01tgyzw49","country_code":"SG","type":"education","lineage":["https://openalex.org/I165932596"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Yenni Tim","raw_affiliation_strings":["School of Computing, National University of Singapore, Singapore, 117417"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Computing, National University of Singapore, Singapore, 117417","institution_ids":["https://openalex.org/I165932596"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5023989495","display_name":"Weng\u2010Fai Wong","orcid":"https://orcid.org/0000-0002-4281-2053"},"institutions":[{"id":"https://openalex.org/I165932596","display_name":"National University of Singapore","ror":"https://ror.org/01tgyzw49","country_code":"SG","type":"education","lineage":["https://openalex.org/I165932596"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Weng-Fai Wong","raw_affiliation_strings":["School of Computing, National University of Singapore, Singapore, 117417"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Computing, National University of Singapore, Singapore, 117417","institution_ids":["https://openalex.org/I165932596"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5015622742","display_name":"Zhong-Liang Ong","orcid":null},"institutions":[{"id":"https://openalex.org/I165932596","display_name":"National University of Singapore","ror":"https://ror.org/01tgyzw49","country_code":"SG","type":"education","lineage":["https://openalex.org/I165932596"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Zhong-Liang Ong","raw_affiliation_strings":["School of Computing, National University of Singapore, Singapore, 117417"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Computing, National University of Singapore, Singapore, 117417","institution_ids":["https://openalex.org/I165932596"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103258530","display_name":"Zhenyu Sun","orcid":"https://orcid.org/0000-0002-6584-3629"},"institutions":[{"id":"https://openalex.org/I170201317","display_name":"University of Pittsburgh","ror":"https://ror.org/01an3r305","country_code":"US","type":"education","lineage":["https://openalex.org/I170201317"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Zhenyu Sun","raw_affiliation_strings":["Swanson School of Engineering, University of Pittsburgh, Pittsburgh, PA 15261"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Swanson School of Engineering, University of Pittsburgh, Pittsburgh, PA 15261","institution_ids":["https://openalex.org/I170201317"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100429403","display_name":"Hai Li","orcid":"https://orcid.org/0000-0003-3228-6544"},"institutions":[{"id":"https://openalex.org/I170201317","display_name":"University of Pittsburgh","ror":"https://ror.org/01an3r305","country_code":"US","type":"education","lineage":["https://openalex.org/I170201317"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Hai Helen Li","raw_affiliation_strings":["Swanson School of Engineering, University of Pittsburgh, Pittsburgh, PA 15261"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Swanson School of Engineering, University of Pittsburgh, Pittsburgh, PA 15261","institution_ids":["https://openalex.org/I170201317"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":6,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":4.7266,"has_fulltext":false,"cited_by_count":35,"citation_normalized_percentile":{"value":0.9491092,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":90,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"610","last_page":"615"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7565047740936279},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.6943320035934448},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.6709187030792236},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5092724561691284},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4687982201576233},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.45801013708114624},{"id":"https://openalex.org/keywords/cache-only-memory-architecture","display_name":"Cache-only memory architecture","score":0.4503253996372223},{"id":"https://openalex.org/keywords/key","display_name":"Key (lock)","score":0.41834133863449097},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.39989471435546875},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.27536243200302124},{"id":"https://openalex.org/keywords/cache-coloring","display_name":"Cache coloring","score":0.2392328381538391},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.17947086691856384}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7565047740936279},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.6943320035934448},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.6709187030792236},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5092724561691284},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4687982201576233},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.45801013708114624},{"id":"https://openalex.org/C3720319","wikidata":"https://www.wikidata.org/wiki/Q5015937","display_name":"Cache-only memory architecture","level":5,"score":0.4503253996372223},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.41834133863449097},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.39989471435546875},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.27536243200302124},{"id":"https://openalex.org/C201148951","wikidata":"https://www.wikidata.org/wiki/Q5015976","display_name":"Cache coloring","level":4,"score":0.2392328381538391},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.17947086691856384}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/aspdac.2014.6742958","is_oa":false,"landing_page_url":"https://doi.org/10.1109/aspdac.2014.6742958","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 19th Asia and South Pacific Design Automation Conference (ASP-DAC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.8500000238418579,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":16,"referenced_works":["https://openalex.org/W2006483103","https://openalex.org/W2010202670","https://openalex.org/W2042076387","https://openalex.org/W2047379549","https://openalex.org/W2082450466","https://openalex.org/W2084007230","https://openalex.org/W2105768042","https://openalex.org/W2108048675","https://openalex.org/W2108453702","https://openalex.org/W2136316949","https://openalex.org/W2138146350","https://openalex.org/W2142276919","https://openalex.org/W2155551886","https://openalex.org/W2169875292","https://openalex.org/W2170382128","https://openalex.org/W3147620158"],"related_works":["https://openalex.org/W2186949690","https://openalex.org/W2167303720","https://openalex.org/W2154109900","https://openalex.org/W2497617944","https://openalex.org/W3019064768","https://openalex.org/W1563139915","https://openalex.org/W2109715593","https://openalex.org/W2061075966","https://openalex.org/W3019683061","https://openalex.org/W3147501184"],"abstract_inverted_index":{"STT-RAM":[0,83],"is":[1,40],"an":[2],"emerging":[3],"NVRAM":[4],"technology":[5],"that":[6,28],"promises":[7],"high":[8],"density,":[9],"low":[10],"energy":[11,70],"and":[12,32],"a":[13,23,73],"comparable":[14],"access":[15],"speed":[16],"to":[17,49,59],"conventional":[18],"SRAM.":[19],"This":[20],"paper":[21],"proposes":[22],"hybrid":[24,65],"L1":[25],"cache":[26,46,56],"architecture":[27],"incorporates":[29],"both":[30],"SRAM":[31],"STT-RAM.":[33],"The":[34],"key":[35],"novelty":[36],"of":[37,43,69,82],"the":[38,41,44,60,80,86],"proposal":[39],"exploition":[42],"MESI":[45],"coherence":[47],"protocol":[48],"perform":[50],"dynamic":[51],"block":[52],"reallocation":[53],"between":[54],"different":[55],"partitions.":[57],"Compared":[58],"pure":[61],"SRAM-based":[62],"design,":[63],"our":[64],"scheme":[66],"achieves":[67],"38%":[68],"saving":[71],"with":[72],"mere":[74],"0.8%":[75],"IPC":[76],"degradation":[77],"while":[78],"extending":[79],"lifespan":[81],"partition":[84],"at":[85],"same":[87],"time.":[88]},"counts_by_year":[{"year":2024,"cited_by_count":3},{"year":2023,"cited_by_count":1},{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":3},{"year":2019,"cited_by_count":7},{"year":2018,"cited_by_count":4},{"year":2017,"cited_by_count":5},{"year":2016,"cited_by_count":7},{"year":2015,"cited_by_count":2},{"year":2014,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}