{"id":"https://openalex.org/W2125026746","doi":"https://doi.org/10.1109/aspdac.2014.6742925","title":"Annotation and analysis combined cache modeling for native simulation","display_name":"Annotation and analysis combined cache modeling for native simulation","publication_year":2014,"publication_date":"2014-01-01","ids":{"openalex":"https://openalex.org/W2125026746","doi":"https://doi.org/10.1109/aspdac.2014.6742925","mag":"2125026746"},"language":"en","primary_location":{"id":"doi:10.1109/aspdac.2014.6742925","is_oa":false,"landing_page_url":"https://doi.org/10.1109/aspdac.2014.6742925","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 19th Asia and South Pacific Design Automation Conference (ASP-DAC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100329480","display_name":"Rongjie Yan","orcid":"https://orcid.org/0000-0001-5225-6268"},"institutions":[{"id":"https://openalex.org/I4210128818","display_name":"Institute of Software","ror":"https://ror.org/033dfsn42","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210128818"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Rongjie Yan","raw_affiliation_strings":["State Key Laboratory of Computer Science, Institute of Software, Beijing, China","State Key Lab. of Comput. Sci., Inst. of Software, Beijing, China"],"affiliations":[{"raw_affiliation_string":"State Key Laboratory of Computer Science, Institute of Software, Beijing, China","institution_ids":["https://openalex.org/I4210128818"]},{"raw_affiliation_string":"State Key Lab. of Comput. Sci., Inst. of Software, Beijing, China","institution_ids":["https://openalex.org/I4210128818"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101655468","display_name":"De Ma","orcid":"https://orcid.org/0000-0001-8700-938X"},"institutions":[{"id":"https://openalex.org/I50760025","display_name":"Hangzhou Dianzi University","ror":"https://ror.org/0576gt767","country_code":"CN","type":"education","lineage":["https://openalex.org/I50760025"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"De Ma","raw_affiliation_strings":["Institute of Microelectronic CAD, Hangzhou Dianzi University, Hangzhou, China","Inst. of Microelectron. CAD, Hangzhou Dianzi Univ., Hangzhou, China"],"affiliations":[{"raw_affiliation_string":"Institute of Microelectronic CAD, Hangzhou Dianzi University, Hangzhou, China","institution_ids":["https://openalex.org/I50760025"]},{"raw_affiliation_string":"Inst. of Microelectron. CAD, Hangzhou Dianzi Univ., Hangzhou, China","institution_ids":["https://openalex.org/I50760025"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100768452","display_name":"Kai Huang","orcid":"https://orcid.org/0000-0003-0359-7810"},"institutions":[{"id":"https://openalex.org/I76130692","display_name":"Zhejiang University","ror":"https://ror.org/00a2xv884","country_code":"CN","type":"education","lineage":["https://openalex.org/I76130692"]},{"id":"https://openalex.org/I4210092088","display_name":"Zhejiang Province Institute of Architectural Design and Research","ror":"https://ror.org/00f89ms08","country_code":"CN","type":"facility","lineage":["https://openalex.org/I4210092088"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Kai Huang","raw_affiliation_strings":["Institute of VLSI Design, Zhejiang University, Hangzhou, China","Institute of VLSI Design Zhejiang University Hangzhou China"],"affiliations":[{"raw_affiliation_string":"Institute of VLSI Design, Zhejiang University, Hangzhou, China","institution_ids":["https://openalex.org/I4210092088","https://openalex.org/I76130692"]},{"raw_affiliation_string":"Institute of VLSI Design Zhejiang University Hangzhou China","institution_ids":["https://openalex.org/I4210092088","https://openalex.org/I76130692"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100372789","display_name":"Xiaoxu Zhang","orcid":"https://orcid.org/0009-0003-0130-0793"},"institutions":[{"id":"https://openalex.org/I76130692","display_name":"Zhejiang University","ror":"https://ror.org/00a2xv884","country_code":"CN","type":"education","lineage":["https://openalex.org/I76130692"]},{"id":"https://openalex.org/I4210092088","display_name":"Zhejiang Province Institute of Architectural Design and Research","ror":"https://ror.org/00f89ms08","country_code":"CN","type":"facility","lineage":["https://openalex.org/I4210092088"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xiaoxu Zhang","raw_affiliation_strings":["Institute of VLSI Design, Zhejiang University, Hangzhou, China","Institute of VLSI Design Zhejiang University Hangzhou China"],"affiliations":[{"raw_affiliation_string":"Institute of VLSI Design, Zhejiang University, Hangzhou, China","institution_ids":["https://openalex.org/I4210092088","https://openalex.org/I76130692"]},{"raw_affiliation_string":"Institute of VLSI Design Zhejiang University Hangzhou China","institution_ids":["https://openalex.org/I4210092088","https://openalex.org/I76130692"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5074059776","display_name":"Siwen Xiu","orcid":null},"institutions":[{"id":"https://openalex.org/I76130692","display_name":"Zhejiang University","ror":"https://ror.org/00a2xv884","country_code":"CN","type":"education","lineage":["https://openalex.org/I76130692"]},{"id":"https://openalex.org/I4210092088","display_name":"Zhejiang Province Institute of Architectural Design and Research","ror":"https://ror.org/00f89ms08","country_code":"CN","type":"facility","lineage":["https://openalex.org/I4210092088"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Siwen Xiu","raw_affiliation_strings":["Institute of VLSI Design, Zhejiang University, Hangzhou, China","Institute of VLSI Design Zhejiang University Hangzhou China"],"affiliations":[{"raw_affiliation_string":"Institute of VLSI Design, Zhejiang University, Hangzhou, China","institution_ids":["https://openalex.org/I4210092088","https://openalex.org/I76130692"]},{"raw_affiliation_string":"Institute of VLSI Design Zhejiang University Hangzhou China","institution_ids":["https://openalex.org/I4210092088","https://openalex.org/I76130692"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5100329480"],"corresponding_institution_ids":["https://openalex.org/I4210128818"],"apc_list":null,"apc_paid":null,"fwci":0.3065,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.61761575,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"310","issue":null,"first_page":"406","last_page":"411"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.998199999332428,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8678460121154785},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.7885898351669312},{"id":"https://openalex.org/keywords/annotation","display_name":"Annotation","score":0.6602312326431274},{"id":"https://openalex.org/keywords/profiling","display_name":"Profiling (computer programming)","score":0.5897915363311768},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.554581880569458},{"id":"https://openalex.org/keywords/cache-algorithms","display_name":"Cache algorithms","score":0.5502774715423584},{"id":"https://openalex.org/keywords/trace","display_name":"TRACE (psycholinguistics)","score":0.5493752360343933},{"id":"https://openalex.org/keywords/mpsoc","display_name":"MPSoC","score":0.5174782276153564},{"id":"https://openalex.org/keywords/cache-invalidation","display_name":"Cache invalidation","score":0.41510745882987976},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.3856329023838043},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.2431434988975525},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.15050852298736572},{"id":"https://openalex.org/keywords/multiprocessing","display_name":"Multiprocessing","score":0.07275912165641785}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8678460121154785},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.7885898351669312},{"id":"https://openalex.org/C2776321320","wikidata":"https://www.wikidata.org/wiki/Q857525","display_name":"Annotation","level":2,"score":0.6602312326431274},{"id":"https://openalex.org/C187191949","wikidata":"https://www.wikidata.org/wiki/Q1138496","display_name":"Profiling (computer programming)","level":2,"score":0.5897915363311768},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.554581880569458},{"id":"https://openalex.org/C38556500","wikidata":"https://www.wikidata.org/wiki/Q13404475","display_name":"Cache algorithms","level":4,"score":0.5502774715423584},{"id":"https://openalex.org/C75291252","wikidata":"https://www.wikidata.org/wiki/Q1315756","display_name":"TRACE (psycholinguistics)","level":2,"score":0.5493752360343933},{"id":"https://openalex.org/C2777187653","wikidata":"https://www.wikidata.org/wiki/Q975106","display_name":"MPSoC","level":3,"score":0.5174782276153564},{"id":"https://openalex.org/C25536678","wikidata":"https://www.wikidata.org/wiki/Q5015977","display_name":"Cache invalidation","level":5,"score":0.41510745882987976},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.3856329023838043},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.2431434988975525},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.15050852298736572},{"id":"https://openalex.org/C4822641","wikidata":"https://www.wikidata.org/wiki/Q846651","display_name":"Multiprocessing","level":2,"score":0.07275912165641785},{"id":"https://openalex.org/C41895202","wikidata":"https://www.wikidata.org/wiki/Q8162","display_name":"Linguistics","level":1,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/aspdac.2014.6742925","is_oa":false,"landing_page_url":"https://doi.org/10.1109/aspdac.2014.6742925","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 19th Asia and South Pacific Design Automation Conference (ASP-DAC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W1614261443","https://openalex.org/W1970939331","https://openalex.org/W1981268630","https://openalex.org/W1986449043","https://openalex.org/W1996142033","https://openalex.org/W1996489373","https://openalex.org/W2088572851","https://openalex.org/W2096258337","https://openalex.org/W2170692588","https://openalex.org/W3144830948"],"related_works":["https://openalex.org/W2350993697","https://openalex.org/W2031173804","https://openalex.org/W2803610590","https://openalex.org/W2363769136","https://openalex.org/W3085471909","https://openalex.org/W2009566782","https://openalex.org/W2114386333","https://openalex.org/W1994118623","https://openalex.org/W2109715593","https://openalex.org/W57688818"],"abstract_inverted_index":{"To":[0],"accelerate":[1],"the":[2,56,64,67],"speed":[3,44],"of":[4,58,66],"performance":[5,74],"estimation":[6],"and":[7,18,47],"raise":[8],"its":[9],"accuracy":[10],"for":[11,70],"MPSoC,":[12],"we":[13],"propose":[14],"a":[15,33,49],"static":[16],"analysis":[17],"dynamic":[19,50],"annotation":[20,51],"combined":[21],"method":[22],"to":[23,37,43,53],"efficiently":[24],"model":[25,36],"cache":[26,35],"mechanism":[27],"in":[28],"native":[29],"simulation.":[30],"We":[31],"use":[32],"new":[34],"statically":[38],"analyze":[39],"segmental":[40],"profiling":[41],"results":[42,62],"up":[45],"simulation,":[46],"utilize":[48],"technique":[52],"exactly":[54],"trace":[55],"addresses":[57],"local":[59],"variables.":[60],"Experimental":[61],"show":[63],"efficiency":[65],"proposed":[68],"techniques":[69],"more":[71],"accurate":[72],"system":[73],"estimation.":[75]},"counts_by_year":[{"year":2017,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
